ARM: mmp: add mmc resource
Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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@ -1,6 +1,8 @@
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#ifndef __ASM_MACH_MMP2_H
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#define __ASM_MACH_MMP2_H
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#include <plat/sdhci.h>
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struct sys_timer;
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extern struct sys_timer mmp2_timer;
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@ -22,6 +24,10 @@ extern struct pxa_device_desc mmp2_device_twsi3;
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extern struct pxa_device_desc mmp2_device_twsi4;
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extern struct pxa_device_desc mmp2_device_twsi5;
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extern struct pxa_device_desc mmp2_device_twsi6;
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extern struct pxa_device_desc mmp2_device_sdh0;
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extern struct pxa_device_desc mmp2_device_sdh1;
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extern struct pxa_device_desc mmp2_device_sdh2;
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extern struct pxa_device_desc mmp2_device_sdh3;
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static inline int mmp2_add_uart(int id)
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{
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@ -63,5 +69,21 @@ static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data,
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return pxa_register_device(d, data, sizeof(*data));
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}
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static inline int mmp2_add_sdhost(int id, struct sdhci_pxa_platdata *data)
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{
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struct pxa_device_desc *d = NULL;
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switch (id) {
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case 0: d = &mmp2_device_sdh0; break;
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case 1: d = &mmp2_device_sdh1; break;
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case 2: d = &mmp2_device_sdh2; break;
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case 3: d = &mmp2_device_sdh3; break;
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default:
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return -EINVAL;
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}
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return pxa_register_device(d, data, sizeof(*data));
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}
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#endif /* __ASM_MACH_MMP2_H */
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@ -27,6 +27,8 @@
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#define APMU_DMA APMU_REG(0x064)
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#define APMU_GEU APMU_REG(0x068)
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#define APMU_BUS APMU_REG(0x06c)
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#define APMU_SDH2 APMU_REG(0x0e8)
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#define APMU_SDH3 APMU_REG(0x0ec)
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#define APMU_FNCLK_EN (1 << 4)
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#define APMU_AXICLK_EN (1 << 3)
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@ -115,6 +115,29 @@ void __init mmp2_init_irq(void)
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mmp2_init_gpio();
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}
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static void sdhc_clk_enable(struct clk *clk)
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{
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uint32_t clk_rst;
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clk_rst = __raw_readl(clk->clk_rst);
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clk_rst |= clk->enable_val;
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__raw_writel(clk_rst, clk->clk_rst);
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}
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static void sdhc_clk_disable(struct clk *clk)
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{
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uint32_t clk_rst;
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clk_rst = __raw_readl(clk->clk_rst);
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clk_rst &= ~clk->enable_val;
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__raw_writel(clk_rst, clk->clk_rst);
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}
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struct clkops sdhc_clk_ops = {
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.enable = sdhc_clk_enable,
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.disable = sdhc_clk_disable,
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};
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/* APB peripheral clocks */
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static APBC_CLK(uart1, MMP2_UART1, 1, 26000000);
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static APBC_CLK(uart2, MMP2_UART2, 1, 26000000);
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@ -128,6 +151,10 @@ static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
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static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
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static APMU_CLK(nand, NAND, 0xbf, 100000000);
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static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
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static APMU_CLK_OPS(sdh1, SDH1, 0x1b, 200000000, &sdhc_clk_ops);
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static APMU_CLK_OPS(sdh2, SDH2, 0x1b, 200000000, &sdhc_clk_ops);
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static APMU_CLK_OPS(sdh3, SDH3, 0x1b, 200000000, &sdhc_clk_ops);
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static struct clk_lookup mmp2_clkregs[] = {
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INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
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@ -141,6 +168,10 @@ static struct clk_lookup mmp2_clkregs[] = {
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INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
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INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
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INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
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INIT_CLKREG(&clk_sdh0, "sdhci-pxa.0", "PXA-SDHCLK"),
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INIT_CLKREG(&clk_sdh1, "sdhci-pxa.1", "PXA-SDHCLK"),
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INIT_CLKREG(&clk_sdh2, "sdhci-pxa.2", "PXA-SDHCLK"),
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INIT_CLKREG(&clk_sdh3, "sdhci-pxa.3", "PXA-SDHCLK"),
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};
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static int __init mmp2_init(void)
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@ -191,4 +222,8 @@ MMP2_DEVICE(twsi4, "pxa2xx-i2c", 3, TWSI4, 0xd4033000, 0x70);
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MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70);
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MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70);
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MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29);
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MMP2_DEVICE(sdh0, "sdhci-pxa", 0, MMC, 0xd4280000, 0x120);
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MMP2_DEVICE(sdh1, "sdhci-pxa", 1, MMC2, 0xd4280800, 0x120);
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MMP2_DEVICE(sdh2, "sdhci-pxa", 2, MMC3, 0xd4281000, 0x120);
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MMP2_DEVICE(sdh3, "sdhci-pxa", 3, MMC4, 0xd4281800, 0x120);
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