regmap-irq: Cleanups and remove unused
Merge series from Aidan MacDonald <aidanmacdonald.0x0@gmail.com>: This is a straightforward patch series, mostly just removing a bunch of old features that were only used by a handful of drivers. - 1/4 and 2/4 remove unused, deprecated functionality - 3/4 makes the behavior of .handle_mask_sync() a bit more consistent w.r.t. mask and unmask registers, to aid maintainability. - 4/4 removes now-unused "inverted mask/unmask" compatibility code.
This commit is contained in:
Mark Brown
commit
5363246266
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@ -30,9 +30,6 @@ struct regmap_irq_chip_data {
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int irq;
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int wake_count;
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unsigned int mask_base;
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unsigned int unmask_base;
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void *status_reg_buf;
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unsigned int *main_status_buf;
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unsigned int *status_buf;
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@ -113,24 +110,22 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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* suppress pointless writes.
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*/
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for (i = 0; i < d->chip->num_regs; i++) {
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if (d->mask_base) {
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if (d->chip->handle_mask_sync)
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d->chip->handle_mask_sync(i, d->mask_buf_def[i],
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d->mask_buf[i],
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d->chip->irq_drv_data);
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else {
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reg = d->get_irq_reg(d, d->mask_base, i);
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ret = regmap_update_bits(d->map, reg,
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d->mask_buf_def[i],
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d->mask_buf[i]);
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if (ret)
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dev_err(d->map->dev, "Failed to sync masks in %x\n",
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reg);
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}
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if (d->chip->handle_mask_sync)
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d->chip->handle_mask_sync(i, d->mask_buf_def[i],
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d->mask_buf[i],
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d->chip->irq_drv_data);
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if (d->chip->mask_base && !d->chip->handle_mask_sync) {
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reg = d->get_irq_reg(d, d->chip->mask_base, i);
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ret = regmap_update_bits(d->map, reg,
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d->mask_buf_def[i],
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d->mask_buf[i]);
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if (ret)
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dev_err(d->map->dev, "Failed to sync masks in %x\n", reg);
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}
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if (d->unmask_base) {
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reg = d->get_irq_reg(d, d->unmask_base, i);
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if (d->chip->unmask_base && !d->chip->handle_mask_sync) {
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reg = d->get_irq_reg(d, d->chip->unmask_base, i);
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ret = regmap_update_bits(d->map, reg,
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d->mask_buf_def[i], ~d->mask_buf[i]);
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if (ret)
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@ -181,20 +176,6 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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}
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}
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/* Don't update the type bits if we're using mask bits for irq type. */
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if (!d->chip->type_in_mask) {
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for (i = 0; i < d->chip->num_type_reg; i++) {
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if (!d->type_buf_def[i])
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continue;
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reg = d->get_irq_reg(d, d->chip->type_base, i);
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ret = regmap_update_bits(d->map, reg,
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d->type_buf_def[i], d->type_buf[i]);
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if (ret != 0)
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dev_err(d->map->dev, "Failed to sync type in %x\n",
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reg);
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}
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}
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for (i = 0; i < d->chip->num_config_bases; i++) {
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for (j = 0; j < d->chip->num_config_regs; j++) {
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reg = d->get_irq_reg(d, d->chip->config_base[i], j);
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@ -273,36 +254,11 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type)
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reg = t->type_reg_offset / map->reg_stride;
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if (t->type_reg_mask)
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d->type_buf[reg] &= ~t->type_reg_mask;
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else
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d->type_buf[reg] &= ~(t->type_falling_val |
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t->type_rising_val |
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t->type_level_low_val |
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t->type_level_high_val);
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switch (type) {
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case IRQ_TYPE_EDGE_FALLING:
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d->type_buf[reg] |= t->type_falling_val;
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break;
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case IRQ_TYPE_EDGE_RISING:
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d->type_buf[reg] |= t->type_rising_val;
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break;
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case IRQ_TYPE_EDGE_BOTH:
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d->type_buf[reg] |= (t->type_falling_val |
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t->type_rising_val);
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break;
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case IRQ_TYPE_LEVEL_HIGH:
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d->type_buf[reg] |= t->type_level_high_val;
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break;
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case IRQ_TYPE_LEVEL_LOW:
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d->type_buf[reg] |= t->type_level_low_val;
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break;
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default:
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return -EINVAL;
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if (d->chip->type_in_mask) {
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ret = regmap_irq_set_type_config_simple(&d->type_buf, type,
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irq_data, reg, d->chip->irq_drv_data);
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if (ret)
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return ret;
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}
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if (d->chip->set_type_config) {
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@ -367,15 +323,8 @@ static inline int read_sub_irq_data(struct regmap_irq_chip_data *data,
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unsigned int offset = subreg->offset[i];
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unsigned int index = offset / map->reg_stride;
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if (chip->not_fixed_stride)
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ret = regmap_read(map,
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chip->status_base + offset,
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&data->status_buf[b]);
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else
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ret = regmap_read(map,
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chip->status_base + offset,
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&data->status_buf[index]);
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ret = regmap_read(map, chip->status_base + offset,
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&data->status_buf[index]);
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if (ret)
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break;
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}
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@ -430,17 +379,7 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
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* sake of simplicity. and add bulk reads only if needed
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*/
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for (i = 0; i < chip->num_main_regs; i++) {
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/*
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* For not_fixed_stride, don't use ->get_irq_reg().
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* It would produce an incorrect result.
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*/
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if (data->chip->not_fixed_stride)
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reg = chip->main_status +
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i * map->reg_stride * data->irq_reg_stride;
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else
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reg = data->get_irq_reg(data,
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chip->main_status, i);
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reg = data->get_irq_reg(data, chip->main_status, i);
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ret = regmap_read(map, reg, &data->main_status_buf[i]);
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if (ret) {
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dev_err(map->dev,
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@ -606,20 +545,8 @@ static const struct irq_domain_ops regmap_domain_ops = {
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unsigned int regmap_irq_get_irq_reg_linear(struct regmap_irq_chip_data *data,
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unsigned int base, int index)
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{
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const struct regmap_irq_chip *chip = data->chip;
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struct regmap *map = data->map;
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/*
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* FIXME: This is for backward compatibility and should be removed
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* when not_fixed_stride is dropped (it's only used by qcom-pm8008).
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*/
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if (chip->not_fixed_stride && chip->sub_reg_offsets) {
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struct regmap_irq_sub_irq_map *subreg;
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subreg = &chip->sub_reg_offsets[0];
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return base + subreg->offset[0];
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}
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return base + index * map->reg_stride * data->irq_reg_stride;
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}
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EXPORT_SYMBOL_GPL(regmap_irq_get_irq_reg_linear);
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@ -707,8 +634,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
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struct regmap_irq_chip_data *d;
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int i;
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int ret = -ENOMEM;
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int num_type_reg;
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int num_regs;
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u32 reg;
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if (chip->num_regs <= 0)
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@ -717,6 +642,9 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
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if (chip->clear_on_unmask && (chip->ack_base || chip->use_ack))
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return -EINVAL;
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if (chip->mask_base && chip->unmask_base && !chip->mask_unmask_non_inverted)
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return -EINVAL;
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for (i = 0; i < chip->num_irqs; i++) {
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if (chip->irqs[i].reg_offset % map->reg_stride)
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return -EINVAL;
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@ -725,17 +653,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
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return -EINVAL;
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}
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if (chip->not_fixed_stride) {
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dev_warn(map->dev, "not_fixed_stride is deprecated; use ->get_irq_reg() instead");
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for (i = 0; i < chip->num_regs; i++)
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if (chip->sub_reg_offsets[i].num_regs != 1)
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return -EINVAL;
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}
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if (chip->num_type_reg)
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dev_warn(map->dev, "type registers are deprecated; use config registers instead");
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if (irq_base) {
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irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0);
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if (irq_base < 0) {
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@ -780,21 +697,13 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
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goto err_alloc;
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}
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/*
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* Use num_config_regs if defined, otherwise fall back to num_type_reg
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* to maintain backward compatibility.
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*/
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num_type_reg = chip->num_config_regs ? chip->num_config_regs
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: chip->num_type_reg;
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num_regs = chip->type_in_mask ? chip->num_regs : num_type_reg;
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if (num_regs) {
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d->type_buf_def = kcalloc(num_regs,
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if (chip->type_in_mask) {
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d->type_buf_def = kcalloc(chip->num_regs,
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sizeof(*d->type_buf_def), GFP_KERNEL);
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if (!d->type_buf_def)
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goto err_alloc;
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d->type_buf = kcalloc(num_regs, sizeof(*d->type_buf),
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GFP_KERNEL);
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d->type_buf = kcalloc(chip->num_regs, sizeof(*d->type_buf), GFP_KERNEL);
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if (!d->type_buf)
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goto err_alloc;
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}
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@ -824,28 +733,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
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d->chip = chip;
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d->irq_base = irq_base;
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if (chip->mask_base && chip->unmask_base &&
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!chip->mask_unmask_non_inverted) {
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/*
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* Chips that specify both mask_base and unmask_base used to
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* get inverted mask behavior by default, with no way to ask
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* for the normal, non-inverted behavior. This "inverted by
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* default" behavior is deprecated, but we have to support it
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* until existing drivers have been fixed.
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*
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* Existing drivers should be updated by swapping mask_base
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* and unmask_base and setting mask_unmask_non_inverted=true.
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* New drivers should always set the flag.
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*/
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dev_warn(map->dev, "mask_base and unmask_base are inverted, please fix it");
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d->mask_base = chip->unmask_base;
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d->unmask_base = chip->mask_base;
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} else {
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d->mask_base = chip->mask_base;
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d->unmask_base = chip->unmask_base;
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}
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if (chip->irq_reg_stride)
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d->irq_reg_stride = chip->irq_reg_stride;
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else
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@ -874,29 +761,28 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
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for (i = 0; i < chip->num_regs; i++) {
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d->mask_buf[i] = d->mask_buf_def[i];
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if (d->mask_base) {
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if (chip->handle_mask_sync) {
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ret = chip->handle_mask_sync(i,
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d->mask_buf_def[i],
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d->mask_buf[i],
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chip->irq_drv_data);
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if (ret)
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goto err_alloc;
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} else {
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reg = d->get_irq_reg(d, d->mask_base, i);
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ret = regmap_update_bits(d->map, reg,
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d->mask_buf_def[i],
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d->mask_buf[i]);
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if (ret) {
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dev_err(map->dev, "Failed to set masks in 0x%x: %d\n",
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reg, ret);
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goto err_alloc;
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}
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if (chip->handle_mask_sync) {
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ret = chip->handle_mask_sync(i, d->mask_buf_def[i],
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d->mask_buf[i],
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chip->irq_drv_data);
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if (ret)
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goto err_alloc;
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}
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if (chip->mask_base && !chip->handle_mask_sync) {
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reg = d->get_irq_reg(d, chip->mask_base, i);
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ret = regmap_update_bits(d->map, reg,
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d->mask_buf_def[i],
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d->mask_buf[i]);
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if (ret) {
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dev_err(map->dev, "Failed to set masks in 0x%x: %d\n",
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reg, ret);
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goto err_alloc;
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}
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}
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if (d->unmask_base) {
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reg = d->get_irq_reg(d, d->unmask_base, i);
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if (chip->unmask_base && !chip->handle_mask_sync) {
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reg = d->get_irq_reg(d, chip->unmask_base, i);
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ret = regmap_update_bits(d->map, reg,
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d->mask_buf_def[i], ~d->mask_buf[i]);
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if (ret) {
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@ -970,20 +856,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
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}
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}
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if (chip->num_type_reg && !chip->type_in_mask) {
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for (i = 0; i < chip->num_type_reg; ++i) {
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reg = d->get_irq_reg(d, d->chip->type_base, i);
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ret = regmap_read(map, reg, &d->type_buf_def[i]);
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if (ret) {
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dev_err(map->dev, "Failed to get type defaults at 0x%x: %d\n",
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reg, ret);
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goto err_alloc;
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}
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}
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}
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if (irq_base)
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d->domain = irq_domain_create_legacy(fwnode, chip->num_irqs,
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irq_base, 0,
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@ -1528,9 +1528,6 @@ struct regmap_irq_chip_data;
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* status_base. Should contain num_regs arrays.
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* Can be provided for chips with more complex mapping than
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* 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ...
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* When used with not_fixed_stride, each one-element array
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* member contains offset calculated as address from each
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* peripheral to first peripheral.
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* @num_main_regs: Number of 'main status' irq registers for chips which have
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* main_status set.
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*
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@ -1542,8 +1539,6 @@ struct regmap_irq_chip_data;
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* @ack_base: Base ack address. If zero then the chip is clear on read.
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* Using zero value is possible with @use_ack bit.
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* @wake_base: Base address for wake enables. If zero unsupported.
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* @type_base: Base address for irq type. If zero unsupported. Deprecated,
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* use @config_base instead.
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* @config_base: Base address for IRQ type config regs. If null unsupported.
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* @irq_reg_stride: Stride to use for chips where registers are not contiguous.
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* @init_ack_masked: Ack all masked interrupts once during initalization.
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@ -1569,11 +1564,6 @@ struct regmap_irq_chip_data;
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* registers before unmasking interrupts to clear any bits
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* set when they were masked.
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* @runtime_pm: Hold a runtime PM lock on the device when accessing it.
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* @not_fixed_stride: Used when chip peripherals are not laid out with fixed
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* stride. Must be used with sub_reg_offsets containing the
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* offsets to each peripheral. Deprecated; the same thing
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* can be accomplished with a @get_irq_reg callback, without
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* the need for a @sub_reg_offsets table.
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* @no_status: No status register: all interrupts assumed generated by device.
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*
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* @num_regs: Number of registers in each control bank.
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@ -1581,9 +1571,6 @@ struct regmap_irq_chip_data;
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* @irqs: Descriptors for individual IRQs. Interrupt numbers are
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* assigned based on the index in the array of the interrupt.
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* @num_irqs: Number of descriptors.
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*
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* @num_type_reg: Number of type registers. Deprecated, use config registers
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* instead.
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* @num_config_bases: Number of config base registers.
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* @num_config_regs: Number of config registers for each config base register.
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*
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@ -1621,7 +1608,6 @@ struct regmap_irq_chip {
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unsigned int unmask_base;
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unsigned int ack_base;
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unsigned int wake_base;
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unsigned int type_base;
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const unsigned int *config_base;
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unsigned int irq_reg_stride;
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unsigned int init_ack_masked:1;
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@ -1634,7 +1620,6 @@ struct regmap_irq_chip {
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unsigned int type_in_mask:1;
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unsigned int clear_on_unmask:1;
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unsigned int runtime_pm:1;
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unsigned int not_fixed_stride:1;
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unsigned int no_status:1;
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int num_regs;
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@ -1642,7 +1627,6 @@ struct regmap_irq_chip {
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const struct regmap_irq *irqs;
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int num_irqs;
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int num_type_reg;
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int num_config_bases;
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int num_config_regs;
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