mtd: nand: pxa3xx: Add multiple chunk write support
This commit adds write support for large pages (4 KiB, 8 KiB). Such support is implemented by issuing a multiple command sequence, transfering a set of 2 KiB chunks per transaction. The splitted command sequence requires to send the SEQIN command independently of the PAGEPROG command and therefore it's set as an execution command. Since PAGEPROG enables ECC, each 2 KiB chunk of data is written together with ECC code at a controller-fixed location within the flash page. Currently, only devices with a 4 KiB page size has been tested. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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@ -756,6 +756,20 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
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info->buf_start = column;
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set_command_address(info, mtd->writesize, 0, page_addr);
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/*
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* Multiple page programming needs to execute the initial
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* SEQIN command that sets the page address.
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*/
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if (mtd->writesize > PAGE_CHUNK_SIZE) {
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info->ndcb0 |= NDCB0_CMD_TYPE(0x1)
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| NDCB0_EXT_CMD_TYPE(ext_cmd_type)
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| addr_cycle
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| command;
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/* No data transfer in this case */
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info->data_size = 0;
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exec_cmd = 1;
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}
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break;
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case NAND_CMD_PAGEPROG:
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@ -765,13 +779,40 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
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break;
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}
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info->ndcb0 |= NDCB0_CMD_TYPE(0x1)
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| NDCB0_AUTO_RS
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| NDCB0_ST_ROW_EN
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| NDCB0_DBC
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| (NAND_CMD_PAGEPROG << 8)
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| NAND_CMD_SEQIN
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| addr_cycle;
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/* Second command setting for large pages */
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if (mtd->writesize > PAGE_CHUNK_SIZE) {
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/*
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* Multiple page write uses the 'extended command'
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* field. This can be used to issue a command dispatch
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* or a naked-write depending on the current stage.
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*/
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info->ndcb0 |= NDCB0_CMD_TYPE(0x1)
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| NDCB0_LEN_OVRD
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| NDCB0_EXT_CMD_TYPE(ext_cmd_type);
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info->ndcb3 = info->chunk_size +
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info->oob_size;
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/*
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* This is the command dispatch that completes a chunked
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* page program operation.
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*/
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if (info->data_size == 0) {
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info->ndcb0 = NDCB0_CMD_TYPE(0x1)
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| NDCB0_EXT_CMD_TYPE(ext_cmd_type)
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| command;
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info->ndcb1 = 0;
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info->ndcb2 = 0;
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info->ndcb3 = 0;
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}
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} else {
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info->ndcb0 |= NDCB0_CMD_TYPE(0x1)
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| NDCB0_AUTO_RS
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| NDCB0_ST_ROW_EN
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| NDCB0_DBC
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| (NAND_CMD_PAGEPROG << 8)
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| NAND_CMD_SEQIN
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| addr_cycle;
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}
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break;
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case NAND_CMD_PARAM:
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@ -915,8 +956,15 @@ static void armada370_nand_cmdfunc(struct mtd_info *mtd,
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case NAND_CMD_READOOB:
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ext_cmd_type = EXT_CMD_TYPE_MONO;
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break;
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case NAND_CMD_SEQIN:
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ext_cmd_type = EXT_CMD_TYPE_DISPATCH;
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break;
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case NAND_CMD_PAGEPROG:
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ext_cmd_type = EXT_CMD_TYPE_NAKED_RW;
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break;
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default:
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ext_cmd_type = 0;
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break;
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}
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prepare_start_command(info, command);
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@ -954,7 +1002,16 @@ static void armada370_nand_cmdfunc(struct mtd_info *mtd,
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}
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/* Check if the sequence is complete */
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if (info->data_size == 0)
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if (info->data_size == 0 && command != NAND_CMD_PAGEPROG)
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break;
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/*
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* After a splitted program command sequence has issued
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* the command dispatch, the command sequence is complete.
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*/
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if (info->data_size == 0 &&
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command == NAND_CMD_PAGEPROG &&
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ext_cmd_type == EXT_CMD_TYPE_DISPATCH)
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break;
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if (command == NAND_CMD_READ0 || command == NAND_CMD_READOOB) {
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@ -963,6 +1020,14 @@ static void armada370_nand_cmdfunc(struct mtd_info *mtd,
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ext_cmd_type = EXT_CMD_TYPE_LAST_RW;
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else
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ext_cmd_type = EXT_CMD_TYPE_NAKED_RW;
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/*
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* If a splitted program command has no more data to transfer,
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* the command dispatch must be issued to complete.
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*/
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} else if (command == NAND_CMD_PAGEPROG &&
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info->data_size == 0) {
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ext_cmd_type = EXT_CMD_TYPE_DISPATCH;
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}
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} while (1);
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