Revert "pinctrl: amd: Disable and mask interrupts on resume"
This reverts commit b26cd9325b
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This patch introduces a regression on Lenovo Z13, which can't wake
from the lid with it applied; and some unspecified AMD based Dell
platforms are unable to wake from hitting the power button
Signed-off-by: Kornel Dulęba <korneld@chromium.org>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230411134932.292287-1-korneld@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
7e364e5629
commit
534e465845
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@ -872,34 +872,32 @@ static const struct pinconf_ops amd_pinconf_ops = {
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.pin_config_group_set = amd_pinconf_group_set,
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};
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static void amd_gpio_irq_init_pin(struct amd_gpio *gpio_dev, int pin)
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static void amd_gpio_irq_init(struct amd_gpio *gpio_dev)
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{
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const struct pin_desc *pd;
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struct pinctrl_desc *desc = gpio_dev->pctrl->desc;
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unsigned long flags;
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u32 pin_reg, mask;
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int i;
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mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3) |
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BIT(INTERRUPT_MASK_OFF) | BIT(INTERRUPT_ENABLE_OFF) |
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BIT(WAKE_CNTRL_OFF_S4);
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pd = pin_desc_get(gpio_dev->pctrl, pin);
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if (!pd)
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return;
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for (i = 0; i < desc->npins; i++) {
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int pin = desc->pins[i].number;
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const struct pin_desc *pd = pin_desc_get(gpio_dev->pctrl, pin);
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raw_spin_lock_irqsave(&gpio_dev->lock, flags);
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pin_reg = readl(gpio_dev->base + pin * 4);
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pin_reg &= ~mask;
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writel(pin_reg, gpio_dev->base + pin * 4);
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raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
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}
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if (!pd)
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continue;
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static void amd_gpio_irq_init(struct amd_gpio *gpio_dev)
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{
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struct pinctrl_desc *desc = gpio_dev->pctrl->desc;
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int i;
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raw_spin_lock_irqsave(&gpio_dev->lock, flags);
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for (i = 0; i < desc->npins; i++)
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amd_gpio_irq_init_pin(gpio_dev, i);
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pin_reg = readl(gpio_dev->base + i * 4);
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pin_reg &= ~mask;
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writel(pin_reg, gpio_dev->base + i * 4);
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raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
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}
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}
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#ifdef CONFIG_PM_SLEEP
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@ -952,10 +950,8 @@ static int amd_gpio_resume(struct device *dev)
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for (i = 0; i < desc->npins; i++) {
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int pin = desc->pins[i].number;
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if (!amd_gpio_should_save(gpio_dev, pin)) {
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amd_gpio_irq_init_pin(gpio_dev, pin);
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if (!amd_gpio_should_save(gpio_dev, pin))
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continue;
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}
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raw_spin_lock_irqsave(&gpio_dev->lock, flags);
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gpio_dev->saved_regs[i] |= readl(gpio_dev->base + pin * 4) & PIN_IRQ_PENDING;
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