bpf: verifier: mark verified-insn with sub-register zext flag
eBPF ISA specification requires high 32-bit cleared when low 32-bit sub-register is written. This applies to destination register of ALU32 etc. JIT back-ends must guarantee this semantic when doing code-gen. x86_64 and AArch64 ISA has the same semantics, so the corresponding JIT back-end doesn't need to do extra work. However, 32-bit arches (arm, x86, nfp etc.) and some other 64-bit arches (PowerPC, SPARC etc) need to do explicit zero extension to meet this requirement, otherwise code like the following will fail. u64_value = (u64) u32_value ... other uses of u64_value This is because compiler could exploit the semantic described above and save those zero extensions for extending u32_value to u64_value, these JIT back-ends are expected to guarantee this through inserting extra zero extensions which however could be a significant increase on the code size. Some benchmarks show there could be ~40% sub-register writes out of total insns, meaning at least ~40% extra code-gen. One observation is these extra zero extensions are not always necessary. Take above code snippet for example, it is possible u32_value will never be casted into a u64, the value of high 32-bit of u32_value then could be ignored and extra zero extension could be eliminated. This patch implements this idea, insns defining sub-registers will be marked when the high 32-bit of the defined sub-register matters. For those unmarked insns, it is safe to eliminate high 32-bit clearnace for them. Algo: - Split read flags into READ32 and READ64. - Record index of insn that does sub-register write. Keep the index inside reg state and update it during verifier insn walking. - A full register read on a sub-register marks its definition insn as needing zero extension on dst register. A new sub-register write overrides the old one. - When propagating read64 during path pruning, also mark any insn defining a sub-register that is read in the pruned path as full-register. Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: Jiong Wang <jiong.wang@netronome.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org>
This commit is contained in:
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@ -36,9 +36,11 @@
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*/
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*/
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enum bpf_reg_liveness {
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enum bpf_reg_liveness {
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REG_LIVE_NONE = 0, /* reg hasn't been read or written this branch */
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REG_LIVE_NONE = 0, /* reg hasn't been read or written this branch */
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REG_LIVE_READ, /* reg was read, so we're sensitive to initial value */
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REG_LIVE_READ32 = 0x1, /* reg was read, so we're sensitive to initial value */
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REG_LIVE_WRITTEN, /* reg was written first, screening off later reads */
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REG_LIVE_READ64 = 0x2, /* likewise, but full 64-bit content matters */
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REG_LIVE_DONE = 4, /* liveness won't be updating this register anymore */
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REG_LIVE_READ = REG_LIVE_READ32 | REG_LIVE_READ64,
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REG_LIVE_WRITTEN = 0x4, /* reg was written first, screening off later reads */
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REG_LIVE_DONE = 0x8, /* liveness won't be updating this register anymore */
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};
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};
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struct bpf_reg_state {
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struct bpf_reg_state {
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@ -131,6 +133,11 @@ struct bpf_reg_state {
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* pointing to bpf_func_state.
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* pointing to bpf_func_state.
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*/
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*/
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u32 frameno;
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u32 frameno;
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/* Tracks subreg definition. The stored value is the insn_idx of the
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* writing insn. This is safe because subreg_def is used before any insn
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* patching which only happens after main verification finished.
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*/
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s32 subreg_def;
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enum bpf_reg_liveness live;
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enum bpf_reg_liveness live;
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};
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};
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@ -233,6 +240,7 @@ struct bpf_insn_aux_data {
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int ctx_field_size; /* the ctx field size for load insn, maybe 0 */
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int ctx_field_size; /* the ctx field size for load insn, maybe 0 */
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int sanitize_stack_off; /* stack slot to be cleared */
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int sanitize_stack_off; /* stack slot to be cleared */
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bool seen; /* this insn was processed by the verifier */
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bool seen; /* this insn was processed by the verifier */
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bool zext_dst; /* this insn zero extends dst reg */
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u8 alu_state; /* used in combination with alu_limit */
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u8 alu_state; /* used in combination with alu_limit */
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bool prune_point;
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bool prune_point;
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unsigned int orig_idx; /* original instruction index */
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unsigned int orig_idx; /* original instruction index */
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@ -982,6 +982,7 @@ static void mark_reg_not_init(struct bpf_verifier_env *env,
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__mark_reg_not_init(regs + regno);
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__mark_reg_not_init(regs + regno);
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}
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}
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#define DEF_NOT_SUBREG (0)
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static void init_reg_state(struct bpf_verifier_env *env,
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static void init_reg_state(struct bpf_verifier_env *env,
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struct bpf_func_state *state)
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struct bpf_func_state *state)
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{
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{
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@ -992,6 +993,7 @@ static void init_reg_state(struct bpf_verifier_env *env,
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mark_reg_not_init(env, regs, i);
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mark_reg_not_init(env, regs, i);
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regs[i].live = REG_LIVE_NONE;
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regs[i].live = REG_LIVE_NONE;
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regs[i].parent = NULL;
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regs[i].parent = NULL;
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regs[i].subreg_def = DEF_NOT_SUBREG;
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}
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}
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/* frame pointer */
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/* frame pointer */
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@ -1137,7 +1139,7 @@ next:
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*/
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*/
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static int mark_reg_read(struct bpf_verifier_env *env,
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static int mark_reg_read(struct bpf_verifier_env *env,
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const struct bpf_reg_state *state,
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const struct bpf_reg_state *state,
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struct bpf_reg_state *parent)
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struct bpf_reg_state *parent, u8 flag)
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{
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{
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bool writes = parent == state->parent; /* Observe write marks */
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bool writes = parent == state->parent; /* Observe write marks */
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int cnt = 0;
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int cnt = 0;
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@ -1152,17 +1154,26 @@ static int mark_reg_read(struct bpf_verifier_env *env,
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parent->var_off.value, parent->off);
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parent->var_off.value, parent->off);
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return -EFAULT;
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return -EFAULT;
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}
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}
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if (parent->live & REG_LIVE_READ)
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/* The first condition is more likely to be true than the
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* second, checked it first.
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*/
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if ((parent->live & REG_LIVE_READ) == flag ||
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parent->live & REG_LIVE_READ64)
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/* The parentage chain never changes and
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/* The parentage chain never changes and
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* this parent was already marked as LIVE_READ.
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* this parent was already marked as LIVE_READ.
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* There is no need to keep walking the chain again and
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* There is no need to keep walking the chain again and
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* keep re-marking all parents as LIVE_READ.
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* keep re-marking all parents as LIVE_READ.
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* This case happens when the same register is read
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* This case happens when the same register is read
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* multiple times without writes into it in-between.
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* multiple times without writes into it in-between.
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* Also, if parent has the stronger REG_LIVE_READ64 set,
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* then no need to set the weak REG_LIVE_READ32.
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*/
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*/
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break;
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break;
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/* ... then we depend on parent's value */
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/* ... then we depend on parent's value */
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parent->live |= REG_LIVE_READ;
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parent->live |= flag;
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/* REG_LIVE_READ64 overrides REG_LIVE_READ32. */
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if (flag == REG_LIVE_READ64)
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parent->live &= ~REG_LIVE_READ32;
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state = parent;
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state = parent;
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parent = state->parent;
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parent = state->parent;
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writes = true;
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writes = true;
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@ -1174,12 +1185,111 @@ static int mark_reg_read(struct bpf_verifier_env *env,
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return 0;
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return 0;
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}
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}
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/* This function is supposed to be used by the following 32-bit optimization
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* code only. It returns TRUE if the source or destination register operates
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* on 64-bit, otherwise return FALSE.
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*/
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static bool is_reg64(struct bpf_verifier_env *env, struct bpf_insn *insn,
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u32 regno, struct bpf_reg_state *reg, enum reg_arg_type t)
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{
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u8 code, class, op;
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code = insn->code;
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class = BPF_CLASS(code);
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op = BPF_OP(code);
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if (class == BPF_JMP) {
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/* BPF_EXIT for "main" will reach here. Return TRUE
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* conservatively.
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*/
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if (op == BPF_EXIT)
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return true;
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if (op == BPF_CALL) {
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/* BPF to BPF call will reach here because of marking
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* caller saved clobber with DST_OP_NO_MARK for which we
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* don't care the register def because they are anyway
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* marked as NOT_INIT already.
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*/
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if (insn->src_reg == BPF_PSEUDO_CALL)
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return false;
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/* Helper call will reach here because of arg type
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* check, conservatively return TRUE.
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*/
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if (t == SRC_OP)
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return true;
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return false;
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}
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}
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if (class == BPF_ALU64 || class == BPF_JMP ||
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/* BPF_END always use BPF_ALU class. */
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(class == BPF_ALU && op == BPF_END && insn->imm == 64))
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return true;
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if (class == BPF_ALU || class == BPF_JMP32)
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return false;
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if (class == BPF_LDX) {
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if (t != SRC_OP)
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return BPF_SIZE(code) == BPF_DW;
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/* LDX source must be ptr. */
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return true;
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}
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if (class == BPF_STX) {
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if (reg->type != SCALAR_VALUE)
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return true;
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return BPF_SIZE(code) == BPF_DW;
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}
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if (class == BPF_LD) {
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u8 mode = BPF_MODE(code);
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/* LD_IMM64 */
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if (mode == BPF_IMM)
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return true;
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/* Both LD_IND and LD_ABS return 32-bit data. */
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if (t != SRC_OP)
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return false;
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/* Implicit ctx ptr. */
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if (regno == BPF_REG_6)
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return true;
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/* Explicit source could be any width. */
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return true;
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}
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if (class == BPF_ST)
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/* The only source register for BPF_ST is a ptr. */
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return true;
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/* Conservatively return true at default. */
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return true;
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}
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static void mark_insn_zext(struct bpf_verifier_env *env,
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struct bpf_reg_state *reg)
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{
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s32 def_idx = reg->subreg_def;
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if (def_idx == DEF_NOT_SUBREG)
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return;
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env->insn_aux_data[def_idx - 1].zext_dst = true;
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/* The dst will be zero extended, so won't be sub-register anymore. */
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reg->subreg_def = DEF_NOT_SUBREG;
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}
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static int check_reg_arg(struct bpf_verifier_env *env, u32 regno,
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static int check_reg_arg(struct bpf_verifier_env *env, u32 regno,
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enum reg_arg_type t)
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enum reg_arg_type t)
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{
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{
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struct bpf_verifier_state *vstate = env->cur_state;
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struct bpf_verifier_state *vstate = env->cur_state;
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struct bpf_func_state *state = vstate->frame[vstate->curframe];
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struct bpf_func_state *state = vstate->frame[vstate->curframe];
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struct bpf_insn *insn = env->prog->insnsi + env->insn_idx;
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struct bpf_reg_state *reg, *regs = state->regs;
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struct bpf_reg_state *reg, *regs = state->regs;
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bool rw64;
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if (regno >= MAX_BPF_REG) {
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if (regno >= MAX_BPF_REG) {
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verbose(env, "R%d is invalid\n", regno);
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verbose(env, "R%d is invalid\n", regno);
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@ -1187,6 +1297,7 @@ static int check_reg_arg(struct bpf_verifier_env *env, u32 regno,
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}
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}
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reg = ®s[regno];
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reg = ®s[regno];
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rw64 = is_reg64(env, insn, regno, reg, t);
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if (t == SRC_OP) {
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if (t == SRC_OP) {
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/* check whether register used as source operand can be read */
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/* check whether register used as source operand can be read */
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if (reg->type == NOT_INIT) {
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if (reg->type == NOT_INIT) {
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@ -1197,7 +1308,11 @@ static int check_reg_arg(struct bpf_verifier_env *env, u32 regno,
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if (regno == BPF_REG_FP)
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if (regno == BPF_REG_FP)
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return 0;
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return 0;
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return mark_reg_read(env, reg, reg->parent);
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if (rw64)
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mark_insn_zext(env, reg);
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return mark_reg_read(env, reg, reg->parent,
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rw64 ? REG_LIVE_READ64 : REG_LIVE_READ32);
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} else {
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} else {
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/* check whether register used as dest operand can be written to */
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/* check whether register used as dest operand can be written to */
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if (regno == BPF_REG_FP) {
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if (regno == BPF_REG_FP) {
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@ -1205,6 +1320,7 @@ static int check_reg_arg(struct bpf_verifier_env *env, u32 regno,
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return -EACCES;
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return -EACCES;
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}
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}
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reg->live |= REG_LIVE_WRITTEN;
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reg->live |= REG_LIVE_WRITTEN;
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reg->subreg_def = rw64 ? DEF_NOT_SUBREG : env->insn_idx + 1;
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if (t == DST_OP)
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if (t == DST_OP)
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mark_reg_unknown(env, regs, regno);
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mark_reg_unknown(env, regs, regno);
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}
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}
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@ -1384,7 +1500,8 @@ static int check_stack_read(struct bpf_verifier_env *env,
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state->regs[value_regno].live |= REG_LIVE_WRITTEN;
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state->regs[value_regno].live |= REG_LIVE_WRITTEN;
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}
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}
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mark_reg_read(env, ®_state->stack[spi].spilled_ptr,
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mark_reg_read(env, ®_state->stack[spi].spilled_ptr,
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reg_state->stack[spi].spilled_ptr.parent);
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reg_state->stack[spi].spilled_ptr.parent,
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REG_LIVE_READ64);
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return 0;
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return 0;
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} else {
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} else {
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int zeros = 0;
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int zeros = 0;
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return -EACCES;
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return -EACCES;
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}
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}
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mark_reg_read(env, ®_state->stack[spi].spilled_ptr,
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mark_reg_read(env, ®_state->stack[spi].spilled_ptr,
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reg_state->stack[spi].spilled_ptr.parent);
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reg_state->stack[spi].spilled_ptr.parent,
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REG_LIVE_READ64);
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if (value_regno >= 0) {
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if (value_regno >= 0) {
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if (zeros == size) {
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if (zeros == size) {
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/* any size read into register is zero extended,
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/* any size read into register is zero extended,
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@ -2110,6 +2228,12 @@ static int check_mem_access(struct bpf_verifier_env *env, int insn_idx, u32 regn
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value_regno);
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value_regno);
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if (reg_type_may_be_null(reg_type))
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if (reg_type_may_be_null(reg_type))
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regs[value_regno].id = ++env->id_gen;
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regs[value_regno].id = ++env->id_gen;
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/* A load of ctx field could have different
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* actual load size with the one encoded in the
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* insn. When the dst is PTR, it is for sure not
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* a sub-register.
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*/
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regs[value_regno].subreg_def = DEF_NOT_SUBREG;
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}
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}
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regs[value_regno].type = reg_type;
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regs[value_regno].type = reg_type;
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}
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}
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@ -2369,7 +2493,8 @@ mark:
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* the whole slot to be marked as 'read'
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* the whole slot to be marked as 'read'
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*/
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*/
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mark_reg_read(env, &state->stack[spi].spilled_ptr,
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mark_reg_read(env, &state->stack[spi].spilled_ptr,
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state->stack[spi].spilled_ptr.parent);
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state->stack[spi].spilled_ptr.parent,
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REG_LIVE_READ64);
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}
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}
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return update_stack_depth(env, state, min_off);
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return update_stack_depth(env, state, min_off);
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}
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}
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@ -3333,6 +3458,9 @@ static int check_helper_call(struct bpf_verifier_env *env, int func_id, int insn
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check_reg_arg(env, caller_saved[i], DST_OP_NO_MARK);
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check_reg_arg(env, caller_saved[i], DST_OP_NO_MARK);
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}
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}
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/* helper call returns 64-bit value. */
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regs[BPF_REG_0].subreg_def = DEF_NOT_SUBREG;
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/* update return register (already marked as written above) */
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/* update return register (already marked as written above) */
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if (fn->ret_type == RET_INTEGER) {
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if (fn->ret_type == RET_INTEGER) {
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/* sets type to SCALAR_VALUE */
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/* sets type to SCALAR_VALUE */
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@ -4264,6 +4392,7 @@ static int check_alu_op(struct bpf_verifier_env *env, struct bpf_insn *insn)
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*/
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*/
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||||||
*dst_reg = *src_reg;
|
*dst_reg = *src_reg;
|
||||||
dst_reg->live |= REG_LIVE_WRITTEN;
|
dst_reg->live |= REG_LIVE_WRITTEN;
|
||||||
|
dst_reg->subreg_def = DEF_NOT_SUBREG;
|
||||||
} else {
|
} else {
|
||||||
/* R1 = (u32) R2 */
|
/* R1 = (u32) R2 */
|
||||||
if (is_pointer_value(env, insn->src_reg)) {
|
if (is_pointer_value(env, insn->src_reg)) {
|
||||||
|
@ -4274,6 +4403,7 @@ static int check_alu_op(struct bpf_verifier_env *env, struct bpf_insn *insn)
|
||||||
} else if (src_reg->type == SCALAR_VALUE) {
|
} else if (src_reg->type == SCALAR_VALUE) {
|
||||||
*dst_reg = *src_reg;
|
*dst_reg = *src_reg;
|
||||||
dst_reg->live |= REG_LIVE_WRITTEN;
|
dst_reg->live |= REG_LIVE_WRITTEN;
|
||||||
|
dst_reg->subreg_def = env->insn_idx + 1;
|
||||||
} else {
|
} else {
|
||||||
mark_reg_unknown(env, regs,
|
mark_reg_unknown(env, regs,
|
||||||
insn->dst_reg);
|
insn->dst_reg);
|
||||||
|
@ -5353,6 +5483,8 @@ static int check_ld_abs(struct bpf_verifier_env *env, struct bpf_insn *insn)
|
||||||
* Already marked as written above.
|
* Already marked as written above.
|
||||||
*/
|
*/
|
||||||
mark_reg_unknown(env, regs, BPF_REG_0);
|
mark_reg_unknown(env, regs, BPF_REG_0);
|
||||||
|
/* ld_abs load up to 32-bit skb data. */
|
||||||
|
regs[BPF_REG_0].subreg_def = env->insn_idx + 1;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -6309,20 +6441,33 @@ static bool states_equal(struct bpf_verifier_env *env,
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Return 0 if no propagation happened. Return negative error code if error
|
||||||
|
* happened. Otherwise, return the propagated bit.
|
||||||
|
*/
|
||||||
static int propagate_liveness_reg(struct bpf_verifier_env *env,
|
static int propagate_liveness_reg(struct bpf_verifier_env *env,
|
||||||
struct bpf_reg_state *reg,
|
struct bpf_reg_state *reg,
|
||||||
struct bpf_reg_state *parent_reg)
|
struct bpf_reg_state *parent_reg)
|
||||||
{
|
{
|
||||||
|
u8 parent_flag = parent_reg->live & REG_LIVE_READ;
|
||||||
|
u8 flag = reg->live & REG_LIVE_READ;
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
if (parent_reg->live & REG_LIVE_READ || !(reg->live & REG_LIVE_READ))
|
/* When comes here, read flags of PARENT_REG or REG could be any of
|
||||||
|
* REG_LIVE_READ64, REG_LIVE_READ32, REG_LIVE_NONE. There is no need
|
||||||
|
* of propagation if PARENT_REG has strongest REG_LIVE_READ64.
|
||||||
|
*/
|
||||||
|
if (parent_flag == REG_LIVE_READ64 ||
|
||||||
|
/* Or if there is no read flag from REG. */
|
||||||
|
!flag ||
|
||||||
|
/* Or if the read flag from REG is the same as PARENT_REG. */
|
||||||
|
parent_flag == flag)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
err = mark_reg_read(env, reg, parent_reg);
|
err = mark_reg_read(env, reg, parent_reg, flag);
|
||||||
if (err)
|
if (err)
|
||||||
return err;
|
return err;
|
||||||
|
|
||||||
return 0;
|
return flag;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* A write screens off any subsequent reads; but write marks come from the
|
/* A write screens off any subsequent reads; but write marks come from the
|
||||||
|
@ -6356,8 +6501,10 @@ static int propagate_liveness(struct bpf_verifier_env *env,
|
||||||
for (i = frame < vstate->curframe ? BPF_REG_6 : 0; i < BPF_REG_FP; i++) {
|
for (i = frame < vstate->curframe ? BPF_REG_6 : 0; i < BPF_REG_FP; i++) {
|
||||||
err = propagate_liveness_reg(env, &state_reg[i],
|
err = propagate_liveness_reg(env, &state_reg[i],
|
||||||
&parent_reg[i]);
|
&parent_reg[i]);
|
||||||
if (err)
|
if (err < 0)
|
||||||
return err;
|
return err;
|
||||||
|
if (err == REG_LIVE_READ64)
|
||||||
|
mark_insn_zext(env, &parent_reg[i]);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Propagate stack slots. */
|
/* Propagate stack slots. */
|
||||||
|
@ -6367,11 +6514,11 @@ static int propagate_liveness(struct bpf_verifier_env *env,
|
||||||
state_reg = &state->stack[i].spilled_ptr;
|
state_reg = &state->stack[i].spilled_ptr;
|
||||||
err = propagate_liveness_reg(env, state_reg,
|
err = propagate_liveness_reg(env, state_reg,
|
||||||
parent_reg);
|
parent_reg);
|
||||||
if (err)
|
if (err < 0)
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
return err;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int is_state_visited(struct bpf_verifier_env *env, int insn_idx)
|
static int is_state_visited(struct bpf_verifier_env *env, int insn_idx)
|
||||||
|
|
Loading…
Reference in New Issue