staging: vt6655: Rename MACvRegBitsOff

Fix name of a macro that uses CamelCase which is not
accepted by checkpatch.pl

Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/e6bea6707f20a53d0631dd1f477ce72d36cd6f3e.1657657918.git.philipp.g.hortmann@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Philipp Hortmann 2022-07-13 07:01:10 +02:00 committed by Greg Kroah-Hartman
parent ee67fe63b4
commit 5327d71d19
5 changed files with 22 additions and 22 deletions

View File

@ -367,7 +367,7 @@ void CARDbRadioPowerOff(struct vnt_private *priv)
break;
}
MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_RXON);
vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_RXON);
bb_set_deep_sleep(priv, priv->local_id);

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@ -1322,13 +1322,13 @@ static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
case NL80211_IFTYPE_STATION:
break;
case NL80211_IFTYPE_ADHOC:
MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
break;
case NL80211_IFTYPE_AP:
MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
@ -1351,16 +1351,16 @@ static void vnt_remove_interface(struct ieee80211_hw *hw,
case NL80211_IFTYPE_STATION:
break;
case NL80211_IFTYPE_ADHOC:
MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
MACvRegBitsOff(priv->port_offset,
MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
vt6655_mac_reg_bits_off(priv->port_offset,
MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
break;
case NL80211_IFTYPE_AP:
MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
MACvRegBitsOff(priv->port_offset,
MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
vt6655_mac_reg_bits_off(priv->port_offset,
MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
break;
default:
break;
@ -1478,8 +1478,8 @@ static void vnt_bss_info_changed(struct ieee80211_hw *hw,
vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
} else {
MACvRegBitsOff(priv->port_offset, MAC_REG_TCR,
TCR_AUTOBCNTX);
vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TCR,
TCR_AUTOBCNTX);
}
}

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@ -337,7 +337,7 @@ bool MACbSafeRxOff(struct vnt_private *priv)
}
/* try to safe shutdown RX */
MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_RXON);
vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_RXON);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_RXONST))
@ -392,7 +392,7 @@ bool MACbSafeTxOff(struct vnt_private *priv)
}
/* try to safe shutdown TX */
MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_TXON);
vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_TXON);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
@ -423,7 +423,7 @@ bool MACbSafeStop(struct vnt_private *priv)
{
void __iomem *io_base = priv->port_offset;
MACvRegBitsOff(io_base, MAC_REG_TCR, TCR_AUTOBCNTX);
vt6655_mac_reg_bits_off(io_base, MAC_REG_TCR, TCR_AUTOBCNTX);
if (!MACbSafeRxOff(priv)) {
pr_debug(" MACbSafeRxOff == false)\n");
@ -436,7 +436,7 @@ bool MACbSafeStop(struct vnt_private *priv)
return false;
}
MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN);
vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN);
return true;
}
@ -730,7 +730,7 @@ bool MACbPSWakeup(struct vnt_private *priv)
return true;
/* Disable PS */
MACvRegBitsOff(io_base, MAC_REG_PSCTL, PSCTL_PSEN);
vt6655_mac_reg_bits_off(io_base, MAC_REG_PSCTL, PSCTL_PSEN);
/* Check if SyncFlushOK */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {

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@ -551,7 +551,7 @@ do { \
iowrite16(reg_value | (bit_mask), iobase + reg_offset); \
} while (0)
#define MACvRegBitsOff(iobase, reg_offset, bit_mask) \
#define vt6655_mac_reg_bits_off(iobase, reg_offset, bit_mask) \
do { \
unsigned char reg_value; \
reg_value = ioread8(iobase + reg_offset); \

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@ -66,7 +66,7 @@ void PSvEnablePowerSaving(struct vnt_private *priv,
if (wListenInterval >= 2) {
/* clear always listen beacon */
MACvRegBitsOff(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
/* first time set listen next beacon */
vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_LNBCN);
} else {
@ -98,10 +98,10 @@ void PSvDisablePowerSaving(struct vnt_private *priv)
MACbPSWakeup(priv);
/* clear AutoSleep */
MACvRegBitsOff(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
/* clear HWUTSF */
MACvRegBitsOff(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF);
vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF);
/* set always listen beacon */
vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);