PCI: imx6: Add i.MX8MQ PCIe EP support
Add i.MX8MQ PCIe EP support. Link: https://lore.kernel.org/r/1673847684-31893-13-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
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@ -52,6 +52,7 @@ enum imx6_pcie_variants {
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IMX8MQ,
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IMX8MM,
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IMX8MP,
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IMX8MQ_EP,
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};
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#define IMX6_PCIE_FLAG_IMX6_PHY BIT(0)
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@ -153,6 +154,7 @@ struct imx6_pcie {
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static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie)
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{
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WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ &&
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imx6_pcie->drvdata->variant != IMX8MQ_EP &&
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imx6_pcie->drvdata->variant != IMX8MM &&
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imx6_pcie->drvdata->variant != IMX8MP);
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return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14;
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@ -167,13 +169,22 @@ static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie)
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else
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mode = PCI_EXP_TYPE_ROOT_PORT;
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if (imx6_pcie->drvdata->variant == IMX8MQ &&
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imx6_pcie->controller_id == 1) {
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mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE;
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val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, mode);
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} else {
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switch (imx6_pcie->drvdata->variant) {
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case IMX8MQ:
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case IMX8MQ_EP:
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if (imx6_pcie->controller_id == 1) {
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mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE;
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val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE,
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mode);
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} else {
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mask = IMX6Q_GPR12_DEVICE_TYPE;
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val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode);
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}
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break;
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default:
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mask = IMX6Q_GPR12_DEVICE_TYPE;
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val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode);
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break;
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}
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regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val);
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@ -315,6 +326,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
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*/
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break;
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case IMX8MQ:
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case IMX8MQ_EP:
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/*
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* TODO: Currently this code assumes external
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* oscillator is being used
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@ -566,6 +578,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
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break;
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case IMX8MM:
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case IMX8MQ:
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case IMX8MQ_EP:
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case IMX8MP:
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ret = clk_prepare_enable(imx6_pcie->pcie_aux);
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if (ret) {
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@ -611,6 +624,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie)
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break;
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case IMX8MM:
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case IMX8MQ:
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case IMX8MQ_EP:
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case IMX8MP:
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clk_disable_unprepare(imx6_pcie->pcie_aux);
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break;
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@ -676,6 +690,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
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switch (imx6_pcie->drvdata->variant) {
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case IMX7D:
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case IMX8MQ:
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case IMX8MQ_EP:
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reset_control_assert(imx6_pcie->pciephy_reset);
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fallthrough;
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case IMX8MM:
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@ -717,6 +732,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
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switch (imx6_pcie->drvdata->variant) {
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case IMX8MQ:
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case IMX8MQ_EP:
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reset_control_deassert(imx6_pcie->pciephy_reset);
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break;
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case IMX7D:
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@ -804,6 +820,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev)
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break;
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case IMX7D:
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case IMX8MQ:
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case IMX8MQ_EP:
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case IMX8MM:
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case IMX8MP:
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reset_control_deassert(imx6_pcie->apps_reset);
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@ -824,6 +841,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev)
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break;
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case IMX7D:
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case IMX8MQ:
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case IMX8MQ_EP:
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case IMX8MM:
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case IMX8MP:
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reset_control_assert(imx6_pcie->apps_reset);
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@ -1076,6 +1094,9 @@ static int imx6_add_pcie_ep(struct imx6_pcie *imx6_pcie,
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ep->ops = &pcie_ep_ops;
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switch (imx6_pcie->drvdata->variant) {
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case IMX8MQ_EP:
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pcie_dbi2_offset = SZ_1M;
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break;
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default:
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pcie_dbi2_offset = SZ_4K;
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break;
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@ -1261,6 +1282,7 @@ static int imx6_pcie_probe(struct platform_device *pdev)
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"pcie_inbound_axi clock missing or invalid\n");
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break;
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case IMX8MQ:
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case IMX8MQ_EP:
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imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux");
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if (IS_ERR(imx6_pcie->pcie_aux))
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return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux),
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@ -1445,6 +1467,11 @@ static const struct imx6_pcie_drvdata drvdata[] = {
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.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
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.gpr = "fsl,imx8mp-iomuxc-gpr",
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},
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[IMX8MQ_EP] = {
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.variant = IMX8MQ_EP,
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.mode = DW_PCIE_EP_TYPE,
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.gpr = "fsl,imx8mq-iomuxc-gpr",
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},
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};
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static const struct of_device_id imx6_pcie_of_match[] = {
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@ -1455,6 +1482,7 @@ static const struct of_device_id imx6_pcie_of_match[] = {
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{ .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], },
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{ .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], },
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{ .compatible = "fsl,imx8mp-pcie", .data = &drvdata[IMX8MP], },
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{ .compatible = "fsl,imx8mq-pcie-ep", .data = &drvdata[IMX8MQ_EP], },
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{},
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};
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