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drm/i915: Introduce intel_crtc_needs_fastset() 

Replace the somewhat obscure crtc_state.update_pipe checks
with a more descriptive thing. Also nicely matches the
intel_crtc_needs_modeset() counterpart for full modesets.

v2: Handle one more case in the fbc code

Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221021162442.27283-2-ville.syrjala@linux.intel.com
This commit is contained in:
Ville Syrjälä 2022-10-21 19:24:39 +03:00
parent 4c35e5d119
commit 52a90349f2
7 changed files with 33 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/drm/i915/display/hsw_ips.c
View File

@ -105,7 +105,7 @@ static bool hsw_ips_need_disable(struct intel_atomic_state *state,
*/
if (IS_HASWELL(i915) &&
(new_crtc_state->uapi.color_mgmt_changed ||
new_crtc_state->update_pipe) &&
intel_crtc_needs_fastset(new_crtc_state)) &&
new_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)
return true;
@ -147,7 +147,7 @@ static bool hsw_ips_need_enable(struct intel_atomic_state *state,
*/
if (IS_HASWELL(i915) &&
(new_crtc_state->uapi.color_mgmt_changed ||
new_crtc_state->update_pipe) &&
intel_crtc_needs_fastset(new_crtc_state)) &&
new_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)
return true;
@ -155,7 +155,7 @@ static bool hsw_ips_need_enable(struct intel_atomic_state *state,
* We can't read out IPS on broadwell, assume the worst and
* forcibly enable IPS on the first fastset.
*/
if (new_crtc_state->update_pipe && old_crtc_state->inherited)
if (intel_crtc_needs_fastset(new_crtc_state) && old_crtc_state->inherited)
return true;
return !old_crtc_state->ips_enabled;

2
drivers/gpu/drm/i915/display/intel_crtc.c
View File

@ -387,7 +387,7 @@ static bool intel_crtc_needs_vblank_work(const struct intel_crtc_state *crtc_sta
!intel_crtc_needs_modeset(crtc_state) &&
!crtc_state->preload_luts &&
(crtc_state->uapi.color_mgmt_changed ||
crtc_state->update_pipe);
intel_crtc_needs_fastset(crtc_state));
}
static void intel_crtc_vblank_work(struct kthread_work *base)

6
drivers/gpu/drm/i915/display/intel_cursor.c
View File

@ -631,8 +631,10 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
*
* FIXME bigjoiner fastpath would be good
*/
if (!crtc_state->hw.active || intel_crtc_needs_modeset(crtc_state) ||
crtc_state->update_pipe || crtc_state->bigjoiner_pipes)
if (!crtc_state->hw.active ||
intel_crtc_needs_modeset(crtc_state) ||
intel_crtc_needs_fastset(crtc_state) ||
crtc_state->bigjoiner_pipes)
goto slow;
/*

28
drivers/gpu/drm/i915/display/intel_display.c
View File

@ -4851,7 +4851,8 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
if (c8_planes_changed(crtc_state))
crtc_state->uapi.color_mgmt_changed = true;
if (mode_changed || crtc_state->update_pipe ||
if (mode_changed ||
intel_crtc_needs_fastset(crtc_state) ||
crtc_state->uapi.color_mgmt_changed) {
ret = intel_color_check(crtc_state);
if (ret)
@ -4878,7 +4879,8 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
}
if (DISPLAY_VER(dev_priv) >= 9) {
if (mode_changed || crtc_state->update_pipe) {
if (mode_changed ||
intel_crtc_needs_fastset(crtc_state)) {
ret = skl_update_scaler_crtc(crtc_state);
if (ret)
return ret;
@ -6889,7 +6891,7 @@ static int intel_atomic_check(struct drm_device *dev,
goto fail;
if (!intel_crtc_needs_modeset(new_crtc_state) &&
!new_crtc_state->update_pipe)
!intel_crtc_needs_fastset(new_crtc_state))
continue;
intel_crtc_state_dump(new_crtc_state, state,
@ -6927,7 +6929,8 @@ static int intel_atomic_prepare_commit(struct intel_atomic_state *state)
for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
bool mode_changed = intel_crtc_needs_modeset(crtc_state);
if (mode_changed || crtc_state->update_pipe ||
if (mode_changed ||
intel_crtc_needs_fastset(crtc_state) ||
crtc_state->uapi.color_mgmt_changed) {
intel_dsb_prepare(crtc_state);
}
@ -7012,13 +7015,13 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state,
*/
if (!modeset) {
if (new_crtc_state->uapi.color_mgmt_changed ||
new_crtc_state->update_pipe)
intel_crtc_needs_fastset(new_crtc_state))
intel_color_commit_arm(new_crtc_state);
if (DISPLAY_VER(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
bdw_set_pipemisc(new_crtc_state);
if (new_crtc_state->update_pipe)
if (intel_crtc_needs_fastset(new_crtc_state))
intel_pipe_fastset(old_crtc_state, new_crtc_state);
}
@ -7078,16 +7081,16 @@ static void intel_update_crtc(struct intel_atomic_state *state,
if (!modeset) {
if (new_crtc_state->preload_luts &&
(new_crtc_state->uapi.color_mgmt_changed ||
new_crtc_state->update_pipe))
intel_crtc_needs_fastset(new_crtc_state)))
intel_color_load_luts(new_crtc_state);
intel_pre_plane_update(state, crtc);
if (new_crtc_state->update_pipe)
if (intel_crtc_needs_fastset(new_crtc_state))
intel_encoders_update_pipe(state, crtc);
if (DISPLAY_VER(i915) >= 11 &&
new_crtc_state->update_pipe)
intel_crtc_needs_fastset(new_crtc_state))
icl_set_pipe_chicken(new_crtc_state);
}
@ -7095,7 +7098,7 @@ static void intel_update_crtc(struct intel_atomic_state *state,
if (!modeset &&
(new_crtc_state->uapi.color_mgmt_changed ||
new_crtc_state->update_pipe))
intel_crtc_needs_fastset(new_crtc_state)))
intel_color_commit_noarm(new_crtc_state);
intel_crtc_planes_update_noarm(state, crtc);
@ -7117,7 +7120,7 @@ static void intel_update_crtc(struct intel_atomic_state *state,
* valid pipe configuration from the BIOS we need to take care
* of enabling them on the CRTC's first fastset.
*/
if (new_crtc_state->update_pipe && !modeset &&
if (intel_crtc_needs_fastset(new_crtc_state) && !modeset &&
old_crtc_state->inherited)
intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);
}
@ -7475,9 +7478,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
if (intel_crtc_needs_modeset(new_crtc_state) ||
new_crtc_state->update_pipe) {
intel_crtc_needs_fastset(new_crtc_state))
intel_modeset_get_crtc_power_domains(new_crtc_state, &put_domains[crtc->pipe]);
}
}
intel_commit_modeset_disables(state);

6
drivers/gpu/drm/i915/display/intel_display_types.h
View File

@ -2058,6 +2058,12 @@ intel_crtc_needs_modeset(const struct intel_crtc_state *crtc_state)
return drm_atomic_crtc_needs_modeset(&crtc_state->uapi);
}
static inline bool
intel_crtc_needs_fastset(const struct intel_crtc_state *crtc_state)
{
return crtc_state->update_pipe;
}
static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *plane_state)
{
return i915_ggtt_offset(plane_state->ggtt_vma);

3
drivers/gpu/drm/i915/display/intel_fbc.c
View File

@ -1520,7 +1520,8 @@ void intel_fbc_update(struct intel_atomic_state *state,
mutex_lock(&fbc->lock);
if (crtc_state->update_pipe && plane_state->no_fbc_reason) {
if (intel_crtc_needs_fastset(crtc_state) &&
plane_state->no_fbc_reason) {
if (fbc->state.plane == plane)
__intel_fbc_disable(fbc);
} else {

3
drivers/gpu/drm/i915/display/intel_modeset_verify.c
View File

@ -227,7 +227,8 @@ void intel_modeset_verify_crtc(struct intel_crtc *crtc,
struct intel_crtc_state *old_crtc_state,
struct intel_crtc_state *new_crtc_state)
{
if (!intel_crtc_needs_modeset(new_crtc_state) && !new_crtc_state->update_pipe)
if (!intel_crtc_needs_modeset(new_crtc_state) &&
!intel_crtc_needs_fastset(new_crtc_state))
return;
intel_wm_state_verify(crtc, new_crtc_state);