ARM: shmobile: R8A7778: add Ether support
Add Ether clock and platform device for R8A7778 SoC; add a function to register this device with board-specific platform data. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -58,11 +58,13 @@ static struct clk *main_clks[] = {
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};
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enum {
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MSTP114,
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MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
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MSTP016, MSTP015,
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MSTP_NR };
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static struct clk mstp_clks[MSTP_NR] = {
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[MSTP114] = SH_CLK_MSTP32(&clkp, MSTPCR1, 14, 0), /* Ether */
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[MSTP026] = SH_CLK_MSTP32(&clkp, MSTPCR0, 26, 0), /* SCIF0 */
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[MSTP025] = SH_CLK_MSTP32(&clkp, MSTPCR0, 25, 0), /* SCIF1 */
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[MSTP024] = SH_CLK_MSTP32(&clkp, MSTPCR0, 24, 0), /* SCIF2 */
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@ -75,6 +77,7 @@ static struct clk mstp_clks[MSTP_NR] = {
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static struct clk_lookup lookups[] = {
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/* MSTP32 clocks */
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CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */
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CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
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CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
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CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
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@ -18,8 +18,11 @@
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#ifndef __ASM_R8A7778_H__
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#define __ASM_R8A7778_H__
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#include <linux/sh_eth.h>
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extern void r8a7778_add_standard_devices(void);
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extern void r8a7778_add_standard_devices_dt(void);
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extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
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extern void r8a7778_init_delay(void);
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extern void r8a7778_init_irq(void);
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extern void r8a7778_init_irq_dt(void);
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@ -3,6 +3,7 @@
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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* Copyright (C) 2013 Cogent Embedded, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -79,6 +80,12 @@ static struct sh_timer_config sh_tmu1_platform_data = {
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.clocksource_rating = 200,
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};
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/* Ether */
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static struct resource ether_resources[] = {
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DEFINE_RES_MEM(0xfde00000, 0x400),
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DEFINE_RES_IRQ(gic_iid(0x89)),
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};
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#define r8a7778_register_tmu(idx) \
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platform_device_register_resndata( \
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&platform_bus, "sh_tmu", idx, \
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@ -111,6 +118,14 @@ void __init r8a7778_add_standard_devices(void)
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r8a7778_register_tmu(1);
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}
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void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata)
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{
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platform_device_register_resndata(&platform_bus, "sh_eth", -1,
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ether_resources,
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ARRAY_SIZE(ether_resources),
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pdata, sizeof(*pdata));
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}
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static struct renesas_intc_irqpin_config irqpin_platform_data = {
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.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
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.sense_bitfield_width = 2,
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