ARM: dts: meson: add the TIMER B/C/D interrupts
The timer on Meson6/Meson8/Meson8b SoCs has four internal timer events. For each of these a separate interrupt exists. Pass these interrupts to allow using the timers other than TIMER A. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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@ -200,7 +200,10 @@
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timer@9940 {
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compatible = "amlogic,meson6-timer";
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reg = <0x9940 0x18>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 11 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 6 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
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};
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};
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