ste_dma40: remove enum for endianess
A bool will suffice. The default is little endian. Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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@ -135,12 +135,10 @@ struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
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.mode = STEDMA40_MODE_PHYSICAL,
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.dir = STEDMA40_MEM_TO_MEM,
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.src_info.endianess = STEDMA40_LITTLE_ENDIAN,
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.src_info.data_width = STEDMA40_BYTE_WIDTH,
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.src_info.psize = STEDMA40_PSIZE_PHY_1,
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.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
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.dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
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.dst_info.data_width = STEDMA40_BYTE_WIDTH,
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.dst_info.psize = STEDMA40_PSIZE_PHY_1,
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.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
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@ -149,12 +147,10 @@ struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
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struct stedma40_chan_cfg dma40_memcpy_conf_log = {
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.dir = STEDMA40_MEM_TO_MEM,
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.src_info.endianess = STEDMA40_LITTLE_ENDIAN,
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.src_info.data_width = STEDMA40_BYTE_WIDTH,
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.src_info.psize = STEDMA40_PSIZE_LOG_1,
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.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
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.dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
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.dst_info.data_width = STEDMA40_BYTE_WIDTH,
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.dst_info.psize = STEDMA40_PSIZE_LOG_1,
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.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
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@ -69,11 +69,6 @@ enum stedma40_flow_ctrl {
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STEDMA40_FLOW_CTRL,
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};
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enum stedma40_endianess {
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STEDMA40_LITTLE_ENDIAN,
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STEDMA40_BIG_ENDIAN
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};
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enum stedma40_periph_data_width {
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STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT,
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STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT,
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@ -92,13 +87,13 @@ enum stedma40_xfer_dir {
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/**
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* struct stedma40_chan_cfg - dst/src channel configuration
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*
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* @endianess: Endianess of the src/dst hardware
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* @big_endian: true if the src/dst should be read as big endian
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* @data_width: Data width of the src/dst hardware
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* @p_size: Burst size
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* @flow_ctrl: Flow control on/off.
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*/
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struct stedma40_half_channel_info {
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enum stedma40_endianess endianess;
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bool big_endian;
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enum stedma40_periph_data_width data_width;
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int psize;
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enum stedma40_flow_ctrl flow_ctrl;
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@ -2239,11 +2239,11 @@ static void d40_set_runtime_config(struct dma_chan *chan,
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/* Set up all the endpoint configs */
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cfg->src_info.data_width = addr_width;
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cfg->src_info.psize = psize;
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cfg->src_info.endianess = STEDMA40_LITTLE_ENDIAN;
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cfg->src_info.big_endian = false;
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cfg->src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL;
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cfg->dst_info.data_width = addr_width;
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cfg->dst_info.psize = psize;
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cfg->dst_info.endianess = STEDMA40_LITTLE_ENDIAN;
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cfg->dst_info.big_endian = false;
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cfg->dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL;
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/* Fill in register values */
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@ -113,8 +113,10 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg,
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dst |= 1 << D40_SREG_CFG_PRI_POS;
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}
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src |= cfg->src_info.endianess << D40_SREG_CFG_LBE_POS;
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dst |= cfg->dst_info.endianess << D40_SREG_CFG_LBE_POS;
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if (cfg->src_info.big_endian)
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src |= 1 << D40_SREG_CFG_LBE_POS;
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if (cfg->dst_info.big_endian)
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dst |= 1 << D40_SREG_CFG_LBE_POS;
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*src_cfg = src;
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*dst_cfg = dst;
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