ARM: dts: aspeed-g6: Add FMC and SPI devices
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
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@ -82,6 +82,85 @@
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<0x40466000 0x2000>;
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};
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fmc: spi@1e620000 {
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reg = < 0x1e620000 0xc4
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0x20000000 0x10000000 >;
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "aspeed,ast2600-fmc";
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clocks = <&syscon ASPEED_CLK_AHB>;
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status = "disabled";
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
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flash@0 {
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reg = < 0 >;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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status = "disabled";
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};
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flash@1 {
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reg = < 1 >;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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status = "disabled";
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};
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flash@2 {
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reg = < 2 >;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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status = "disabled";
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};
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};
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spi1: spi@1e630000 {
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reg = < 0x1e630000 0xc4
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0x30000000 0x10000000 >;
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "aspeed,ast2600-spi";
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clocks = <&syscon ASPEED_CLK_AHB>;
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status = "disabled";
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flash@0 {
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reg = < 0 >;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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status = "disabled";
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};
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flash@1 {
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reg = < 1 >;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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status = "disabled";
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};
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};
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spi2: spi@1e631000 {
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reg = < 0x1e631000 0xc4
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0x50000000 0x10000000 >;
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "aspeed,ast2600-spi";
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clocks = <&syscon ASPEED_CLK_AHB>;
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status = "disabled";
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flash@0 {
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reg = < 0 >;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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status = "disabled";
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};
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flash@1 {
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reg = < 1 >;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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status = "disabled";
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};
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flash@2 {
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reg = < 2 >;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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status = "disabled";
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};
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};
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mdio0: mdio@1e650000 {
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compatible = "aspeed,ast2600-mdio";
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reg = <0x1e650000 0x8>;
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