KVM: X86: Allow userspace to define the microcode version
Linux (among the others) has checks to make sure that certain features aren't enabled on a certain family/model/stepping if the microcode version isn't greater than or equal to a known good version. By exposing the real microcode version, we're preventing buggy guests that don't check that they are running virtualized (i.e., they should trust the hypervisor) from disabling features that are effectively not buggy. Suggested-by: Filippo Sironi <sironi@amazon.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: Liran Alon <liran.alon@oracle.com> Cc: Nadav Amit <nadav.amit@gmail.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Wanpeng Li <wanpengli@tencent.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
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@ -507,6 +507,7 @@ struct kvm_vcpu_arch {
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u64 smi_count;
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bool tpr_access_reporting;
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u64 ia32_xss;
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u64 microcode_version;
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/*
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* Paging state of the vcpu
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@ -1907,6 +1907,7 @@ static void svm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
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u32 dummy;
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u32 eax = 1;
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vcpu->arch.microcode_version = 0x01000065;
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svm->spec_ctrl = 0;
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if (!init_event) {
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@ -3962,9 +3963,6 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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msr_info->data = svm->spec_ctrl;
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break;
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case MSR_IA32_UCODE_REV:
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msr_info->data = 0x01000065;
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break;
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case MSR_F15H_IC_CFG: {
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int family, model;
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@ -5771,6 +5771,7 @@ static void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
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vmx->rmode.vm86_active = 0;
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vmx->spec_ctrl = 0;
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vcpu->arch.microcode_version = 0x100000000ULL;
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vmx->vcpu.arch.regs[VCPU_REGS_RDX] = get_rdx_init_val();
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kvm_set_cr8(vcpu, 0);
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@ -1055,6 +1055,7 @@ static unsigned num_emulated_msrs;
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*/
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static u32 msr_based_features[] = {
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MSR_F10H_DECFG,
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MSR_IA32_UCODE_REV,
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};
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static unsigned int num_msr_based_features;
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@ -1062,6 +1063,9 @@ static unsigned int num_msr_based_features;
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static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
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{
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switch (msr->index) {
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case MSR_IA32_UCODE_REV:
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rdmsrl(msr->index, msr->data);
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break;
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default:
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if (kvm_x86_ops->get_msr_feature(msr))
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return 1;
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@ -2257,7 +2261,6 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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switch (msr) {
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case MSR_AMD64_NB_CFG:
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case MSR_IA32_UCODE_REV:
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case MSR_IA32_UCODE_WRITE:
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case MSR_VM_HSAVE_PA:
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case MSR_AMD64_PATCH_LOADER:
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@ -2265,6 +2268,10 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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case MSR_AMD64_DC_CFG:
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break;
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case MSR_IA32_UCODE_REV:
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if (msr_info->host_initiated)
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vcpu->arch.microcode_version = data;
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break;
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case MSR_EFER:
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return set_efer(vcpu, data);
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case MSR_K7_HWCR:
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@ -2560,7 +2567,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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msr_info->data = 0;
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break;
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case MSR_IA32_UCODE_REV:
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msr_info->data = 0x100000000ULL;
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msr_info->data = vcpu->arch.microcode_version;
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break;
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case MSR_MTRRcap:
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case 0x200 ... 0x2ff:
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