UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

mtd: nand: ecc-hamming: Let the software Hamming ECC engine be unselected 

There is no reason to always embed the software Hamming ECC engine
implementation. By default it is (with raw NAND), but we can let the
user decide.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-19-miquel.raynal@bootlin.com
This commit is contained in:
Miquel Raynal 2020-09-30 01:01:22 +02:00
parent eb08376a5d
commit 5180a62c12
3 changed files with 47 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
drivers/mtd/nand/Kconfig
View File

@ -16,7 +16,16 @@ config MTD_NAND_ECC
depends on MTD_NAND_CORE
config MTD_NAND_ECC_SW_HAMMING
bool
bool "Software Hamming ECC engine"
default y if MTD_RAW_NAND
select MTD_NAND_ECC
help
This enables support for software Hamming error
correction. This correction can correct up to 1 bit error
per chunk and detect up to 2 bit errors. While it used to be
widely used with old parts, newer NAND chips usually require
more strength correction and in this case BCH or RS will be
preferred.
config MTD_NAND_ECC_SW_HAMMING_SMC
bool "NAND ECC Smart Media byte order"

2
drivers/mtd/nand/raw/Kconfig
View File

@ -3,7 +3,6 @@ menuconfig MTD_RAW_NAND
tristate "Raw/Parallel NAND Device Support"
select MTD_NAND_CORE
select MTD_NAND_ECC
select MTD_NAND_ECC_SW_HAMMING
help
This enables support for accessing all type of raw/parallel
NAND flash devices. For further information see
@ -72,6 +71,7 @@ config MTD_NAND_AU1550
config MTD_NAND_NDFC
tristate "IBM/MCC 4xx NAND controller"
depends on 4xx
select MTD_NAND_ECC_SW_HAMMING
select MTD_NAND_ECC_SW_HAMMING_SMC
help
NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs

36
include/linux/mtd/nand-ecc-sw-hamming.h
View File

@ -32,6 +32,8 @@ struct nand_ecc_sw_hamming_conf {
unsigned int sm_order;
};
#if IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING)
int ecc_sw_hamming_calculate(const unsigned char *buf, unsigned int step_size,
unsigned char *code, bool sm_order);
int nand_ecc_sw_hamming_calculate(struct nand_device *nand,
@ -44,4 +46,38 @@ int nand_ecc_sw_hamming_correct(struct nand_device *nand, unsigned char *buf,
unsigned char *read_ecc,
unsigned char *calc_ecc);
#else /* !CONFIG_MTD_NAND_ECC_SW_HAMMING */
static inline int ecc_sw_hamming_calculate(const unsigned char *buf,
unsigned int step_size,
unsigned char *code, bool sm_order)
{
return -ENOTSUPP;
}
static inline int nand_ecc_sw_hamming_calculate(struct nand_device *nand,
const unsigned char *buf,
unsigned char *code)
{
return -ENOTSUPP;
}
static inline int ecc_sw_hamming_correct(unsigned char *buf,
unsigned char *read_ecc,
unsigned char *calc_ecc,
unsigned int step_size, bool sm_order)
{
return -ENOTSUPP;
}
static inline int nand_ecc_sw_hamming_correct(struct nand_device *nand,
unsigned char *buf,
unsigned char *read_ecc,
unsigned char *calc_ecc)
{
return -ENOTSUPP;
}
#endif /* CONFIG_MTD_NAND_ECC_SW_HAMMING */
#endif /* __MTD_NAND_ECC_SW_HAMMING_H__ */