remoteproc: k3-r5: Use separate compatible string for TI AM62x SoC family
AM62 and AM62A SoCs use single core R5F which is a new scenario different than the one being used with CLUSTER_MODE_SINGLECPU which is for utilizing a single core from a set of cores available in R5F cluster present in the SoC. To support this single core scenario map it with newly defined CLUSTER_MODE_SINGLECORE and use it when compatible is set to ti,am62-r5fss. Also set PROC_BOOT_CFG_FLAG_R5_SINGLE_CORE config for CLUSTER_MODE_SINGLECORE too as it is required by R5 core when it is being as general purpose core instead of device manager. For IPC-only mode when config flag PROC_BOOT_CFG_FLAG_R5_SINGLE_CORE is set, skip overriding to CLUSTER_MODE_SINGLECPU when CLUSTER_MODE_SINGLECORE is set as same flag is applicable for single core configuration too. Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Link: https://lore.kernel.org/r/20230327152832.923480-4-devarsht@ti.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
This commit is contained in:
Devarsh Thakkar
Mathieu Poirier
parent
f3d81b4537
commit
51723657be
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@ -71,14 +71,16 @@ struct k3_r5_mem {
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/*
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* All cluster mode values are not applicable on all SoCs. The following
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* are the modes supported on various SoCs:
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* Split mode : AM65x, J721E, J7200 and AM64x SoCs
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* LockStep mode : AM65x, J721E and J7200 SoCs
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* Single-CPU mode : AM64x SoCs only
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* Split mode : AM65x, J721E, J7200 and AM64x SoCs
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* LockStep mode : AM65x, J721E and J7200 SoCs
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* Single-CPU mode : AM64x SoCs only
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* Single-Core mode : AM62x, AM62A SoCs
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*/
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enum cluster_mode {
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CLUSTER_MODE_SPLIT = 0,
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CLUSTER_MODE_LOCKSTEP,
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CLUSTER_MODE_SINGLECPU,
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CLUSTER_MODE_SINGLECORE
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};
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/**
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@ -86,11 +88,13 @@ enum cluster_mode {
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* @tcm_is_double: flag to denote the larger unified TCMs in certain modes
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* @tcm_ecc_autoinit: flag to denote the auto-initialization of TCMs for ECC
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* @single_cpu_mode: flag to denote if SoC/IP supports Single-CPU mode
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* @is_single_core: flag to denote if SoC/IP has only single core R5
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*/
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struct k3_r5_soc_data {
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bool tcm_is_double;
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bool tcm_ecc_autoinit;
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bool single_cpu_mode;
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bool is_single_core;
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};
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/**
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@ -838,7 +842,8 @@ static int k3_r5_rproc_configure(struct k3_r5_rproc *kproc)
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core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem);
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if (cluster->mode == CLUSTER_MODE_LOCKSTEP ||
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cluster->mode == CLUSTER_MODE_SINGLECPU) {
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cluster->mode == CLUSTER_MODE_SINGLECPU ||
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cluster->mode == CLUSTER_MODE_SINGLECORE) {
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core = core0;
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} else {
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core = kproc->core;
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@ -877,7 +882,8 @@ static int k3_r5_rproc_configure(struct k3_r5_rproc *kproc)
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* with the bit configured, so program it only on
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* permitted cores
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*/
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if (cluster->mode == CLUSTER_MODE_SINGLECPU) {
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if (cluster->mode == CLUSTER_MODE_SINGLECPU ||
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cluster->mode == CLUSTER_MODE_SINGLECORE) {
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set_cfg = PROC_BOOT_CFG_FLAG_R5_SINGLE_CORE;
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} else {
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/*
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@ -1069,6 +1075,7 @@ static void k3_r5_adjust_tcm_sizes(struct k3_r5_rproc *kproc)
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if (cluster->mode == CLUSTER_MODE_LOCKSTEP ||
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cluster->mode == CLUSTER_MODE_SINGLECPU ||
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cluster->mode == CLUSTER_MODE_SINGLECORE ||
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!cluster->soc_data->tcm_is_double)
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return;
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@ -1145,7 +1152,7 @@ static int k3_r5_rproc_configure_mode(struct k3_r5_rproc *kproc)
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single_cpu = cfg & PROC_BOOT_CFG_FLAG_R5_SINGLE_CORE ? 1 : 0;
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lockstep_en = cfg & PROC_BOOT_CFG_FLAG_R5_LOCKSTEP ? 1 : 0;
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if (single_cpu)
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if (single_cpu && mode != CLUSTER_MODE_SINGLECORE)
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mode = CLUSTER_MODE_SINGLECPU;
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if (lockstep_en)
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mode = CLUSTER_MODE_LOCKSTEP;
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@ -1265,9 +1272,12 @@ init_rmem:
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goto err_add;
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}
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/* create only one rproc in lockstep mode or single-cpu mode */
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/* create only one rproc in lockstep, single-cpu or
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* single core mode
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*/
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if (cluster->mode == CLUSTER_MODE_LOCKSTEP ||
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cluster->mode == CLUSTER_MODE_SINGLECPU)
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cluster->mode == CLUSTER_MODE_SINGLECPU ||
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cluster->mode == CLUSTER_MODE_SINGLECORE)
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break;
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}
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@ -1710,19 +1720,33 @@ static int k3_r5_probe(struct platform_device *pdev)
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/*
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* default to most common efuse configurations - Split-mode on AM64x
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* and LockStep-mode on all others
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* default to most common efuse configurations -
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* Split-mode on AM64x
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* Single core on AM62x
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* LockStep-mode on all others
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*/
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cluster->mode = data->single_cpu_mode ?
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if (!data->is_single_core)
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cluster->mode = data->single_cpu_mode ?
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CLUSTER_MODE_SPLIT : CLUSTER_MODE_LOCKSTEP;
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else
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cluster->mode = CLUSTER_MODE_SINGLECORE;
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}
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if (cluster->mode == CLUSTER_MODE_SINGLECPU && !data->single_cpu_mode) {
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if ((cluster->mode == CLUSTER_MODE_SINGLECPU && !data->single_cpu_mode) ||
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(cluster->mode == CLUSTER_MODE_SINGLECORE && !data->is_single_core)) {
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dev_err(dev, "Cluster mode = %d is not supported on this SoC\n", cluster->mode);
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return -EINVAL;
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}
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num_cores = of_get_available_child_count(np);
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if (num_cores != 2) {
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dev_err(dev, "MCU cluster requires both R5F cores to be enabled, num_cores = %d\n",
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if (num_cores != 2 && !data->is_single_core) {
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dev_err(dev, "MCU cluster requires both R5F cores to be enabled but num_cores is set to = %d\n",
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num_cores);
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return -ENODEV;
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}
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if (num_cores != 1 && data->is_single_core) {
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dev_err(dev, "SoC supports only single core R5 but num_cores is set to %d\n",
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num_cores);
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return -ENODEV;
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}
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@ -1764,18 +1788,28 @@ static const struct k3_r5_soc_data am65_j721e_soc_data = {
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.tcm_is_double = false,
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.tcm_ecc_autoinit = false,
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.single_cpu_mode = false,
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.is_single_core = false,
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};
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static const struct k3_r5_soc_data j7200_j721s2_soc_data = {
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.tcm_is_double = true,
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.tcm_ecc_autoinit = true,
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.single_cpu_mode = false,
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.is_single_core = false,
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};
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static const struct k3_r5_soc_data am64_soc_data = {
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.tcm_is_double = true,
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.tcm_ecc_autoinit = true,
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.single_cpu_mode = true,
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.is_single_core = false,
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};
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static const struct k3_r5_soc_data am62_soc_data = {
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.tcm_is_double = false,
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.tcm_ecc_autoinit = true,
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.single_cpu_mode = false,
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.is_single_core = true,
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};
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static const struct of_device_id k3_r5_of_match[] = {
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@ -1783,6 +1817,7 @@ static const struct of_device_id k3_r5_of_match[] = {
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{ .compatible = "ti,j721e-r5fss", .data = &am65_j721e_soc_data, },
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{ .compatible = "ti,j7200-r5fss", .data = &j7200_j721s2_soc_data, },
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{ .compatible = "ti,am64-r5fss", .data = &am64_soc_data, },
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{ .compatible = "ti,am62-r5fss", .data = &am62_soc_data, },
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{ .compatible = "ti,j721s2-r5fss", .data = &j7200_j721s2_soc_data, },
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{ /* sentinel */ },
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};
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