[PATCH] ppc32: Add ppc_sys descriptions for PowerQUICC I devices
Added ppc_sys device and system definitions for PowerQUICC I devices. This will allow drivers for PQI to be proper platform device drivers. Currently sys section contains only MPC885 and MPC866. Identification should be done with identify_ppc_sys_by_name call, with board-specific "name" string passed, since PQI do not have any register that could identify the SOC. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -34,7 +34,8 @@ ifeq ($(CONFIG_40x),y)
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obj-$(CONFIG_PCI) += indirect_pci.o pci_auto.o ppc405_pci.o
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endif
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endif
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obj-$(CONFIG_8xx) += m8xx_setup.o ppc8xx_pic.o $(wdt-mpc8xx-y)
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obj-$(CONFIG_8xx) += m8xx_setup.o ppc8xx_pic.o $(wdt-mpc8xx-y) \
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ppc_sys.o mpc8xx_devices.o mpc8xx_sys.o
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ifeq ($(CONFIG_8xx),y)
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obj-$(CONFIG_PCI) += qspan_pci.o i8259.o
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endif
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@ -0,0 +1,224 @@
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/*
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* arch/ppc/syslib/mpc8xx_devices.c
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*
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* MPC8xx Device descriptions
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*
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* Maintainer: Kumar Gala <kumar.gala@freescale.com>
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*
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* Copyright 2005 MontaVista Software, Inc. by Vitaly Bordug<vbordug@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/serial_8250.h>
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#include <linux/mii.h>
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#include <asm/commproc.h>
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#include <asm/mpc8xx.h>
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#include <asm/irq.h>
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#include <asm/ppc_sys.h>
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/* We use offsets for IORESOURCE_MEM to do not set dependences at compile time.
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* They will get fixed up by mach_mpc8xx_fixup
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*/
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struct platform_device ppc_sys_platform_devices[] = {
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[MPC8xx_CPM_FEC1] = {
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.name = "fsl-cpm-fec",
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.id = 1,
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.num_resources = 2,
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.resource = (struct resource[]) {
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{
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.name = "regs",
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.start = 0xe00,
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.end = 0xe88,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "interrupt",
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.start = MPC8xx_INT_FEC1,
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.end = MPC8xx_INT_FEC1,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC8xx_CPM_FEC2] = {
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.name = "fsl-cpm-fec",
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.id = 2,
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.num_resources = 2,
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.resource = (struct resource[]) {
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{
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.name = "regs",
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.start = 0x1e00,
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.end = 0x1e88,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "interrupt",
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.start = MPC8xx_INT_FEC2,
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.end = MPC8xx_INT_FEC2,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC8xx_CPM_SCC1] = {
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.name = "fsl-cpm-scc",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "regs",
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.start = 0xa00,
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.end = 0xa18,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "pram",
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.start = 0x3c00,
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.end = 0x3c80,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "interrupt",
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.start = MPC8xx_INT_SCC1,
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.end = MPC8xx_INT_SCC1,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC8xx_CPM_SCC2] = {
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.name = "fsl-cpm-scc",
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.id = 2,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "regs",
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.start = 0xa20,
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.end = 0xa38,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "pram",
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.start = 0x3d00,
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.end = 0x3d80,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "interrupt",
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.start = MPC8xx_INT_SCC2,
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.end = MPC8xx_INT_SCC2,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC8xx_CPM_SCC3] = {
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.name = "fsl-cpm-scc",
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.id = 3,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "regs",
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.start = 0xa40,
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.end = 0xa58,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "pram",
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.start = 0x3e00,
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.end = 0x3e80,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "interrupt",
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.start = MPC8xx_INT_SCC3,
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.end = MPC8xx_INT_SCC3,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC8xx_CPM_SCC4] = {
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.name = "fsl-cpm-scc",
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.id = 4,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "regs",
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.start = 0xa60,
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.end = 0xa78,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "pram",
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.start = 0x3f00,
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.end = 0x3f80,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "interrupt",
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.start = MPC8xx_INT_SCC4,
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.end = MPC8xx_INT_SCC4,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC8xx_CPM_SMC1] = {
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.name = "fsl-cpm-smc",
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.id = 1,
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.num_resources = 2,
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.resource = (struct resource[]) {
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{
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.name = "regs",
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.start = 0xa82,
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.end = 0xa91,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "interrupt",
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.start = MPC8xx_INT_SMC1,
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.end = MPC8xx_INT_SMC1,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC8xx_CPM_SMC2] = {
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.name = "fsl-cpm-smc",
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.id = 2,
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.num_resources = 2,
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.resource = (struct resource[]) {
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{
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.name = "regs",
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.start = 0xa92,
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.end = 0xaa1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "interrupt",
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.start = MPC8xx_INT_SMC2,
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.end = MPC8xx_INT_SMC2,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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};
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static int __init mach_mpc8xx_fixup(struct platform_device *pdev)
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{
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ppc_sys_fixup_mem_resource (pdev, IMAP_ADDR);
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return 0;
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}
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static int __init mach_mpc8xx_init(void)
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{
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ppc_sys_device_fixup = mach_mpc8xx_fixup;
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return 0;
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}
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postcore_initcall(mach_mpc8xx_init);
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@ -0,0 +1,61 @@
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/*
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* arch/ppc/platforms/mpc8xx_sys.c
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*
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* MPC8xx System descriptions
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*
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* Maintainer: Kumar Gala <kumar.gala@freescale.com>
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*
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* Copyright 2005 MontaVista Software, Inc. by Vitaly Bordug <vbordug@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <asm/ppc_sys.h>
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struct ppc_sys_spec *cur_ppc_sys_spec;
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struct ppc_sys_spec ppc_sys_specs[] = {
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{
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.ppc_sys_name = "MPC86X",
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.mask = 0xFFFFFFFF,
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.value = 0x00000000,
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.num_devices = 2,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC8xx_CPM_FEC1,
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MPC8xx_CPM_SCC1,
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MPC8xx_CPM_SCC2,
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MPC8xx_CPM_SCC3,
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MPC8xx_CPM_SCC4,
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MPC8xx_CPM_SMC1,
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MPC8xx_CPM_SMC2,
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},
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},
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{
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.ppc_sys_name = "MPC885",
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.mask = 0xFFFFFFFF,
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.value = 0x00000000,
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.num_devices = 3,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC8xx_CPM_FEC1,
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MPC8xx_CPM_FEC2,
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MPC8xx_CPM_SCC1,
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MPC8xx_CPM_SCC2,
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MPC8xx_CPM_SCC3,
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MPC8xx_CPM_SCC4,
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MPC8xx_CPM_SMC1,
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MPC8xx_CPM_SMC2,
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},
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},
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{ /* default match */
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.ppc_sys_name = "",
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.mask = 0x00000000,
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.value = 0x00000000,
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},
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};
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@ -138,6 +138,16 @@ irq_canonicalize(int irq)
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#define SIU_IRQ7 (14)
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#define SIU_LEVEL7 (15)
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#define MPC8xx_INT_FEC1 SIU_LEVEL1
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#define MPC8xx_INT_FEC2 SIU_LEVEL3
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#define MPC8xx_INT_SCC1 (CPM_IRQ_OFFSET + CPMVEC_SCC1)
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#define MPC8xx_INT_SCC2 (CPM_IRQ_OFFSET + CPMVEC_SCC2)
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#define MPC8xx_INT_SCC3 (CPM_IRQ_OFFSET + CPMVEC_SCC3)
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#define MPC8xx_INT_SCC4 (CPM_IRQ_OFFSET + CPMVEC_SCC4)
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#define MPC8xx_INT_SMC1 (CPM_IRQ_OFFSET + CPMVEC_SMC1)
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#define MPC8xx_INT_SMC2 (CPM_IRQ_OFFSET + CPMVEC_SMC2)
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/* The internal interrupts we can configure as we see fit.
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* My personal preference is CPM at level 2, which puts it above the
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* MBX PCI/ISA/IDE interrupts.
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@ -97,6 +97,22 @@ extern unsigned char __res[];
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struct pt_regs;
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enum ppc_sys_devices {
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MPC8xx_CPM_FEC1,
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MPC8xx_CPM_FEC2,
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MPC8xx_CPM_I2C,
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MPC8xx_CPM_SCC1,
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MPC8xx_CPM_SCC2,
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MPC8xx_CPM_SCC3,
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MPC8xx_CPM_SCC4,
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MPC8xx_CPM_SPI,
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MPC8xx_CPM_MCC1,
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MPC8xx_CPM_MCC2,
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MPC8xx_CPM_SMC1,
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MPC8xx_CPM_SMC2,
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MPC8xx_CPM_USB,
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};
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#endif /* !__ASSEMBLY__ */
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#endif /* CONFIG_8xx */
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#endif /* __CONFIG_8xx_DEFS */
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@ -27,6 +27,8 @@
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#include <asm/mpc83xx.h>
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#elif defined(CONFIG_85xx)
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#include <asm/mpc85xx.h>
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#elif defined(CONFIG_8xx)
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#include <asm/mpc8xx.h>
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#elif defined(CONFIG_PPC_MPC52xx)
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#include <asm/mpc52xx.h>
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#elif defined(CONFIG_MPC10X_BRIDGE)
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