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drm/amd/amdgpu: Tidy up gfx_v9_0_enable_gfx_pipeline_powergating() 

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tom St Denis 2017-08-31 09:27:22 -04:00 committed by Alex Deucher
parent f55ee212ee
commit 513f81332a
1 changed files with 3 additions and 4 deletions
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7
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
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@ -1896,10 +1896,9 @@ static void gfx_v9_0_enable_gfx_pipeline_powergating(struct amdgpu_device *adev,
uint32_t data, default_data;
default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));
if (enable == true)
data |= RLC_PG_CNTL__GFX_PIPELINE_PG_ENABLE_MASK;
else
data &= ~RLC_PG_CNTL__GFX_PIPELINE_PG_ENABLE_MASK;
data = REG_SET_FIELD(data, RLC_PG_CNTL,
GFX_PIPELINE_PG_ENABLE,
enable ? 1 : 0);
if(default_data != data)
WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);