arm64: dts: renesas: r8a77995: draak: Add R-Car Sound support
This patch adds R-Car Sound support for D3 draak. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87czrdx3z5.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -20,6 +20,16 @@
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ethernet0 = &avb;
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ethernet0 = &avb;
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};
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};
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audio_clkout: audio-clkout {
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/*
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* This is same as <&rcar_sound 0>
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* but needed to avoid cs2000/rcar_sound probe dead-lock
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*/
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <12288000>;
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};
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backlight: backlight {
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backlight: backlight {
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compatible = "pwm-backlight";
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 50000>;
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pwms = <&pwm1 0 50000>;
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@ -161,6 +171,14 @@
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regulator-always-on;
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regulator-always-on;
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};
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};
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sound_card: sound {
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compatible = "audio-graph-card";
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dais = <&rsnd_port0 /* ak4613 */
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/* HDMI is not yet supported */
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>;
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};
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vga {
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vga {
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compatible = "vga-connector";
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compatible = "vga-connector";
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@ -198,6 +216,25 @@
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#clock-cells = <0>;
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#clock-cells = <0>;
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clock-frequency = <74250000>;
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clock-frequency = <74250000>;
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};
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};
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x19_clk: x19 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24576000>;
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};
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};
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&audio_clk_b {
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/*
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* X11 is connected to VI4_FIELD/SCIF_CLK/AUDIO_CLKB,
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* and R-Car Sound uses AUDIO_CLKB.
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* Note is that schematic indicates VI4_FIELD conection only
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* not AUDIO_CLKB at SoC page.
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* And this VI4_FIELD/SCIF_CLK/AUDIO_CLKB is connected to SW60.
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* SW60 should be 1-2.
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*/
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clock-frequency = <22579200>;
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};
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};
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&avb {
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&avb {
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@ -273,6 +310,28 @@
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pinctrl-names = "default";
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pinctrl-names = "default";
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status = "okay";
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status = "okay";
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ak4613: codec@10 {
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compatible = "asahi-kasei,ak4613";
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#sound-dai-cells = <0>;
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reg = <0x10>;
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clocks = <&rcar_sound 0>; /* audio_clkout */
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asahi-kasei,in1-single-end;
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asahi-kasei,in2-single-end;
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asahi-kasei,out1-single-end;
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asahi-kasei,out2-single-end;
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asahi-kasei,out3-single-end;
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asahi-kasei,out4-single-end;
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asahi-kasei,out5-single-end;
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asahi-kasei,out6-single-end;
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port {
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ak4613_endpoint: endpoint {
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remote-endpoint = <&rsnd_for_ak4613>;
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};
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};
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};
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composite-in@20 {
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composite-in@20 {
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compatible = "adi,adv7180cp";
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compatible = "adi,adv7180cp";
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reg = <0x20>;
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reg = <0x20>;
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@ -375,6 +434,17 @@
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};
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};
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};
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};
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cs2000: clk-multiplier@4f {
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#clock-cells = <0>;
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compatible = "cirrus,cs2000-cp";
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reg = <0x4f>;
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clocks = <&audio_clkout>, <&x19_clk>; /* audio_clkout_1, x19 */
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clock-names = "clk_in", "ref_clk";
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assigned-clocks = <&cs2000>;
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assigned-clock-rates = <24576000>; /* 1/1 divide */
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};
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eeprom@50 {
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eeprom@50 {
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compatible = "rohm,br24t01", "atmel,24c01";
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compatible = "rohm,br24t01", "atmel,24c01";
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reg = <0x50>;
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reg = <0x50>;
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@ -487,6 +557,17 @@
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power-source = <1800>;
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power-source = <1800>;
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};
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};
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sound_pins: sound {
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groups = "ssi34_ctrl", "ssi3_data", "ssi4_data_a";
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function = "ssi";
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};
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sound_clk_pins: sound-clk {
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groups = "audio_clk_a", "audio_clk_b",
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"audio_clkout", "audio_clkout1";
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function = "audio_clk";
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};
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usb0_pins: usb0 {
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usb0_pins: usb0 {
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groups = "usb0";
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groups = "usb0";
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function = "usb0";
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function = "usb0";
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@ -512,6 +593,42 @@
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status = "okay";
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status = "okay";
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};
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};
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&rcar_sound {
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pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
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pinctrl-names = "default";
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/* Single DAI */
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#sound-dai-cells = <0>;
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/* audio_clkout0/1 */
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#clock-cells = <1>;
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clock-frequency = <12288000 11289600>;
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status = "okay";
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clocks = <&cpg CPG_MOD 1005>,
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<&cpg CPG_MOD 1011>, <&cpg CPG_MOD 1012>,
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<&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
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<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
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<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
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<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
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<&cs2000>, <&audio_clk_b>,
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<&cpg CPG_CORE R8A77995_CLK_ZA2>;
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ports {
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rsnd_port0: port {
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rsnd_for_ak4613: endpoint {
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remote-endpoint = <&ak4613_endpoint>;
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dai-format = "left_j";
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bitclock-master = <&rsnd_for_ak4613>;
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frame-master = <&rsnd_for_ak4613>;
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playback = <&ssi3>, <&src5>, <&dvc0>;
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capture = <&ssi4>, <&src6>, <&dvc1>;
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};
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};
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};
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};
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&rwdt {
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&rwdt {
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timeout-sec = <60>;
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timeout-sec = <60>;
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status = "okay";
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status = "okay";
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@ -540,6 +657,10 @@
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status = "okay";
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status = "okay";
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};
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};
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&ssi4 {
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shared-pin;
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};
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&usb2_phy0 {
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&usb2_phy0 {
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pinctrl-0 = <&usb0_pins>;
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pinctrl-0 = <&usb0_pins>;
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pinctrl-names = "default";
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pinctrl-names = "default";
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