drm/amdgpu: add atomfirmware helper function to query ecc status
ecc default status (enabled or disabled) could be get from umc_config field in umc_info table Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -236,6 +236,37 @@ int amdgpu_atomfirmware_get_vram_type(struct amdgpu_device *adev)
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return 0;
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}
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/*
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* Return true if vbios enabled ecc by default, if umc info table is available
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* or false if ecc is not enabled or umc info table is not available
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*/
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bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev)
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{
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struct amdgpu_mode_info *mode_info = &adev->mode_info;
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int index;
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u16 data_offset, size;
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union umc_info *umc_info;
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u8 frev, crev;
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bool ecc_default_enabled = false;
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index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
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umc_info);
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if (amdgpu_atom_parse_data_header(mode_info->atom_context,
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index, &size, &frev, &crev, &data_offset)) {
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/* support umc_info 3.1+ */
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if ((frev == 3 && crev >= 1) || (frev > 3)) {
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umc_info = (union umc_info *)
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(mode_info->atom_context->bios + data_offset);
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ecc_default_enabled =
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(le32_to_cpu(umc_info->v31.umc_config) &
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UMC_CONFIG__DEFAULT_MEM_ECC_ENABLE) ? true : false;
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}
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}
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return ecc_default_enabled;
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}
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union firmware_info {
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struct atom_firmware_info_v3_1 v31;
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};
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@ -33,5 +33,6 @@ int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev);
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int amdgpu_atomfirmware_get_vram_type(struct amdgpu_device *adev);
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int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev);
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int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev);
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bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev);
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#endif
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