netxen: fix coherent dma mask setting
Change default dma mask for NX3031 to 39 bit with ability to update it to 64-bit (if firmware indicates support). Old code was restricting it under 4GB (32-bit), sometimes causing failure to allocate descriptor rings on heavily populated system. NX2031 based NICs will still get 32-bit coherent mask. Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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9bfdac94c7
commit
50c643e765
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@ -221,7 +221,7 @@ netxen_napi_disable(struct netxen_adapter *adapter)
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}
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}
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}
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}
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static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id)
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static int nx_set_dma_mask(struct netxen_adapter *adapter)
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{
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{
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struct pci_dev *pdev = adapter->pdev;
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struct pci_dev *pdev = adapter->pdev;
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uint64_t mask, cmask;
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uint64_t mask, cmask;
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@ -229,19 +229,17 @@ static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id)
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adapter->pci_using_dac = 0;
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adapter->pci_using_dac = 0;
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mask = DMA_BIT_MASK(32);
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mask = DMA_BIT_MASK(32);
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/*
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* Consistent DMA mask is set to 32 bit because it cannot be set to
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* 35 bits. For P3 also leave it at 32 bits for now. Only the rings
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* come off this pool.
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*/
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cmask = DMA_BIT_MASK(32);
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cmask = DMA_BIT_MASK(32);
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if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
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#ifndef CONFIG_IA64
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#ifndef CONFIG_IA64
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if (revision_id >= NX_P3_B0)
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mask = DMA_BIT_MASK(39);
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else if (revision_id == NX_P2_C1)
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mask = DMA_BIT_MASK(35);
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mask = DMA_BIT_MASK(35);
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#endif
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#endif
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} else {
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mask = DMA_BIT_MASK(39);
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cmask = mask;
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}
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if (pci_set_dma_mask(pdev, mask) == 0 &&
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if (pci_set_dma_mask(pdev, mask) == 0 &&
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pci_set_consistent_dma_mask(pdev, cmask) == 0) {
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pci_set_consistent_dma_mask(pdev, cmask) == 0) {
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adapter->pci_using_dac = 1;
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adapter->pci_using_dac = 1;
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@ -256,7 +254,7 @@ static int
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nx_update_dma_mask(struct netxen_adapter *adapter)
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nx_update_dma_mask(struct netxen_adapter *adapter)
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{
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{
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int change, shift, err;
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int change, shift, err;
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uint64_t mask, old_mask;
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uint64_t mask, old_mask, old_cmask;
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struct pci_dev *pdev = adapter->pdev;
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struct pci_dev *pdev = adapter->pdev;
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change = 0;
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change = 0;
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@ -272,14 +270,29 @@ nx_update_dma_mask(struct netxen_adapter *adapter)
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if (change) {
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if (change) {
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old_mask = pdev->dma_mask;
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old_mask = pdev->dma_mask;
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old_cmask = pdev->dev.coherent_dma_mask;
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mask = (1ULL<<(32+shift)) - 1;
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mask = (1ULL<<(32+shift)) - 1;
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err = pci_set_dma_mask(pdev, mask);
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err = pci_set_dma_mask(pdev, mask);
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if (err)
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if (err)
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return pci_set_dma_mask(pdev, old_mask);
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goto err_out;
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if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
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err = pci_set_consistent_dma_mask(pdev, mask);
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if (err)
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goto err_out;
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}
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dev_info(&pdev->dev, "using %d-bit dma mask\n", 32+shift);
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}
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}
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return 0;
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return 0;
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err_out:
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pci_set_dma_mask(pdev, old_mask);
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pci_set_consistent_dma_mask(pdev, old_cmask);
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return err;
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}
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}
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static void netxen_check_options(struct netxen_adapter *adapter)
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static void netxen_check_options(struct netxen_adapter *adapter)
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@ -1006,7 +1019,7 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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revision_id = pdev->revision;
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revision_id = pdev->revision;
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adapter->ahw.revision_id = revision_id;
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adapter->ahw.revision_id = revision_id;
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err = nx_set_dma_mask(adapter, revision_id);
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err = nx_set_dma_mask(adapter);
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if (err)
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if (err)
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goto err_out_free_netdev;
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goto err_out_free_netdev;
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