mmc: sdhci-pci-o2micro: fix some SD cards compatibility issue at DDR50 mode
Bayhub chips have better compatibility support for SDR50 than DDR50 and both mode have the same R/W performance when clock frequency >= 100MHz. Disable DDR50 mode and use SDR50 instead. Signed-off-by: Chevron Li <chevron.li@bayhubtech.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20220729100524.387-1-chevron.li@bayhubtech.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -317,11 +317,12 @@ static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode)
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u32 reg_val;
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/*
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* This handler only implements the eMMC tuning that is specific to
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* This handler implements the hardware tuning that is specific to
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* this controller. Fall back to the standard method for other TIMING.
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*/
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if ((host->timing != MMC_TIMING_MMC_HS200) &&
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(host->timing != MMC_TIMING_UHS_SDR104))
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(host->timing != MMC_TIMING_UHS_SDR104) &&
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(host->timing != MMC_TIMING_UHS_SDR50))
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return sdhci_execute_tuning(mmc, opcode);
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if (WARN_ON((opcode != MMC_SEND_TUNING_BLOCK_HS200) &&
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@ -631,6 +632,8 @@ static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)
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if (reg & 0x1)
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host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
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host->quirks2 |= SDHCI_QUIRK2_BROKEN_DDR50;
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sdhci_pci_o2_enable_msi(chip, host);
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if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD0) {
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