mmc: sdhci-tegra: Fix switch to HS400ES mode
When CMD13 is sent after switching to HS400ES mode, the bus
is operating at either MMC_HIGH_26_MAX_DTR or MMC_HIGH_52_MAX_DTR.
To meet Tegra SDHCI requirement at HS400ES mode, force SDHCI
interface clock to MMC_HS200_MAX_DTR (200 MHz) so that host
controller CAR clock and the interface clock are rate matched.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Fixes: dfc9700cef
("mmc: tegra: Implement HS400 enhanced strobe")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20211214113653.4631-1-pshete@nvidia.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
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@ -356,23 +356,6 @@ static void tegra_sdhci_set_tap(struct sdhci_host *host, unsigned int tap)
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}
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}
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static void tegra_sdhci_hs400_enhanced_strobe(struct mmc_host *mmc,
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struct mmc_ios *ios)
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{
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struct sdhci_host *host = mmc_priv(mmc);
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u32 val;
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val = sdhci_readl(host, SDHCI_TEGRA_VENDOR_SYS_SW_CTRL);
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if (ios->enhanced_strobe)
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val |= SDHCI_TEGRA_SYS_SW_CTRL_ENHANCED_STROBE;
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else
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val &= ~SDHCI_TEGRA_SYS_SW_CTRL_ENHANCED_STROBE;
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sdhci_writel(host, val, SDHCI_TEGRA_VENDOR_SYS_SW_CTRL);
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}
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static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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@ -793,6 +776,32 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
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}
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}
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static void tegra_sdhci_hs400_enhanced_strobe(struct mmc_host *mmc,
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struct mmc_ios *ios)
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{
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struct sdhci_host *host = mmc_priv(mmc);
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u32 val;
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val = sdhci_readl(host, SDHCI_TEGRA_VENDOR_SYS_SW_CTRL);
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if (ios->enhanced_strobe) {
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val |= SDHCI_TEGRA_SYS_SW_CTRL_ENHANCED_STROBE;
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/*
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* When CMD13 is sent from mmc_select_hs400es() after
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* switching to HS400ES mode, the bus is operating at
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* either MMC_HIGH_26_MAX_DTR or MMC_HIGH_52_MAX_DTR.
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* To meet Tegra SDHCI requirement at HS400ES mode, force SDHCI
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* interface clock to MMC_HS200_MAX_DTR (200 MHz) so that host
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* controller CAR clock and the interface clock are rate matched.
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*/
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tegra_sdhci_set_clock(host, MMC_HS200_MAX_DTR);
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} else {
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val &= ~SDHCI_TEGRA_SYS_SW_CTRL_ENHANCED_STROBE;
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}
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sdhci_writel(host, val, SDHCI_TEGRA_VENDOR_SYS_SW_CTRL);
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}
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static unsigned int tegra_sdhci_get_max_clock(struct sdhci_host *host)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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