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ARM: 8242/1: sa1100: add cpu clock 

Both SA1100 framebuffer and PCMCIA drivers require knowledge of cpu
frequency to correctly program timings.  Currently they receive timing
information by calling cpufreq_get(0).  However if cpu frequency driver
is not enabled (e.g. due to unsupported DRAM chip/board on sa1110)
cpufreq_get(0) returns 0, causing incorrect timings to be programmed.

Add cpu clock returning cpu frequency, to be used by sa11x0 fb and
pcmcia drivers.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Dmitry Eremin-Solenikov 2014-12-03 18:35:29 +01:00 committed by Russell King
parent ab71f99fd7
commit 4faee12884
1 changed files with 34 additions and 7 deletions
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41
arch/arm/mach-sa1100/clock.c
View File

@ -15,10 +15,12 @@
#include <linux/clkdev.h> #include <linux/clkdev.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/generic.h>
struct clkops { struct clkops {
void (*enable)(struct clk *); void (*enable)(struct clk *);
void (*disable)(struct clk *); void (*disable)(struct clk *);
unsigned long (*get_rate)(struct clk *);
}; };
struct clk { struct clk {
@ -33,13 +35,6 @@ struct clk clk_##_name = { \
static DEFINE_SPINLOCK(clocks_lock); static DEFINE_SPINLOCK(clocks_lock);
/* Dummy clk routine to build generic kernel parts that may be using them */
unsigned long clk_get_rate(struct clk *clk)
{
return 0;
}
EXPORT_SYMBOL(clk_get_rate);
static void clk_gpio27_enable(struct clk *clk) static void clk_gpio27_enable(struct clk *clk)
{ {
/* /*
@ -58,6 +53,19 @@ static void clk_gpio27_disable(struct clk *clk)
GAFR &= ~GPIO_32_768kHz; GAFR &= ~GPIO_32_768kHz;
} }
static void clk_cpu_enable(struct clk *clk)
{
}
static void clk_cpu_disable(struct clk *clk)
{
}
static unsigned long clk_cpu_get_rate(struct clk *clk)
{
return sa11x0_getspeed(0) * 1000;
}
int clk_enable(struct clk *clk) int clk_enable(struct clk *clk)
{ {
unsigned long flags; unsigned long flags;
@ -87,16 +95,35 @@ void clk_disable(struct clk *clk)
} }
EXPORT_SYMBOL(clk_disable); EXPORT_SYMBOL(clk_disable);
unsigned long clk_get_rate(struct clk *clk)
{
if (clk && clk->ops && clk->ops->get_rate)
return clk->ops->get_rate(clk);
return 0;
}
EXPORT_SYMBOL(clk_get_rate);
const struct clkops clk_gpio27_ops = { const struct clkops clk_gpio27_ops = {
.enable = clk_gpio27_enable, .enable = clk_gpio27_enable,
.disable = clk_gpio27_disable, .disable = clk_gpio27_disable,
}; };
const struct clkops clk_cpu_ops = {
.enable = clk_cpu_enable,
.disable = clk_cpu_disable,
.get_rate = clk_cpu_get_rate,
};
static DEFINE_CLK(gpio27, &clk_gpio27_ops); static DEFINE_CLK(gpio27, &clk_gpio27_ops);
static DEFINE_CLK(cpu, &clk_cpu_ops);
static struct clk_lookup sa11xx_clkregs[] = { static struct clk_lookup sa11xx_clkregs[] = {
CLKDEV_INIT("sa1111.0", NULL, &clk_gpio27), CLKDEV_INIT("sa1111.0", NULL, &clk_gpio27),
CLKDEV_INIT("sa1100-rtc", NULL, NULL), CLKDEV_INIT("sa1100-rtc", NULL, NULL),
CLKDEV_INIT("sa11x0-fb", NULL, &clk_cpu),
CLKDEV_INIT("sa11x0-pcmcia", NULL, &clk_cpu),
}; };
static int __init sa11xx_clk_init(void) static int __init sa11xx_clk_init(void)