usb: chipidea: udc: add maximum-speed = full-speed option
This patch makes it possible to set the chipidea udc into full-speed only mode. It is set by the oftree property "maximum-speed = full-speed". Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
fad56745a6
commit
4f6743d5ca
|
@ -18,6 +18,7 @@ Optional properties:
|
|||
- vbus-supply: regulator for vbus
|
||||
- disable-over-current: disable over current detect
|
||||
- external-vbus-divider: enables off-chip resistor divider for Vbus
|
||||
- maximum-speed: limit the maximum connection speed to "full-speed".
|
||||
|
||||
Examples:
|
||||
usb@02184000 { /* USB OTG */
|
||||
|
@ -28,4 +29,5 @@ usb@02184000 { /* USB OTG */
|
|||
fsl,usbmisc = <&usbmisc 0>;
|
||||
disable-over-current;
|
||||
external-vbus-divider;
|
||||
maximum-speed = "full-speed";
|
||||
};
|
||||
|
|
|
@ -50,12 +50,14 @@
|
|||
#define PORTSC_PTC (0x0FUL << 16)
|
||||
#define PORTSC_PHCD(d) ((d) ? BIT(22) : BIT(23))
|
||||
/* PTS and PTW for non lpm version only */
|
||||
#define PORTSC_PFSC BIT(24)
|
||||
#define PORTSC_PTS(d) \
|
||||
(u32)((((d) & 0x3) << 30) | (((d) & 0x4) ? BIT(25) : 0))
|
||||
#define PORTSC_PTW BIT(28)
|
||||
#define PORTSC_STS BIT(29)
|
||||
|
||||
/* DEVLC */
|
||||
#define DEVLC_PFSC BIT(23)
|
||||
#define DEVLC_PSPD (0x03UL << 25)
|
||||
#define DEVLC_PSPD_HS (0x02UL << 25)
|
||||
#define DEVLC_PTW BIT(27)
|
||||
|
|
|
@ -64,6 +64,7 @@
|
|||
#include <linux/usb/otg.h>
|
||||
#include <linux/usb/chipidea.h>
|
||||
#include <linux/usb/of.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/phy.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
|
||||
|
@ -298,6 +299,13 @@ int hw_device_reset(struct ci_hdrc *ci, u32 mode)
|
|||
if (ci->platdata->flags & CI_HDRC_DISABLE_STREAMING)
|
||||
hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS, USBMODE_CI_SDIS);
|
||||
|
||||
if (ci->platdata->flags & CI_HDRC_FORCE_FULLSPEED) {
|
||||
if (ci->hw_bank.lpm)
|
||||
hw_write(ci, OP_DEVLC, DEVLC_PFSC, DEVLC_PFSC);
|
||||
else
|
||||
hw_write(ci, OP_PORTSC, PORTSC_PFSC, PORTSC_PFSC);
|
||||
}
|
||||
|
||||
/* USBMODE should be configured step by step */
|
||||
hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
|
||||
hw_write(ci, OP_USBMODE, USBMODE_CM, mode);
|
||||
|
@ -412,6 +420,9 @@ static int ci_get_platdata(struct device *dev,
|
|||
}
|
||||
}
|
||||
|
||||
if (of_usb_get_maximum_speed(dev->of_node) == USB_SPEED_FULL)
|
||||
platdata->flags |= CI_HDRC_FORCE_FULLSPEED;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -25,6 +25,7 @@ struct ci_hdrc_platform_data {
|
|||
*/
|
||||
#define CI_HDRC_DUAL_ROLE_NOT_OTG BIT(4)
|
||||
#define CI_HDRC_IMX28_WRITE_FIX BIT(5)
|
||||
#define CI_HDRC_FORCE_FULLSPEED BIT(6)
|
||||
enum usb_dr_mode dr_mode;
|
||||
#define CI_HDRC_CONTROLLER_RESET_EVENT 0
|
||||
#define CI_HDRC_CONTROLLER_STOPPED_EVENT 1
|
||||
|
|
Loading…
Reference in New Issue