drm/etnaviv: bump HW job limit to 4
The current limit of 2 leads to some GPU idle times, as the usual IRQ latency leads to up to 3 jobs getting signaled at once with some standard workloads. A larger HW job limit might lead to slightly worse QoS, but we accept that to not sacrifice GPU throughput in the common case. Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
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@ -24,7 +24,7 @@
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static int etnaviv_job_hang_limit = 0;
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module_param_named(job_hang_limit, etnaviv_job_hang_limit, int , 0444);
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static int etnaviv_hw_jobs_limit = 2;
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static int etnaviv_hw_jobs_limit = 4;
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module_param_named(hw_job_limit, etnaviv_hw_jobs_limit, int , 0444);
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static struct dma_fence *
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