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net: ethernet: ti: ale: am65: add support for default thread cfg 

Add support for default thread configuration for AM65x CPSW NUSS ALE to
allow route all ingress packets to one default RX UDMA flow.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Tested-by: Murali Karicheri <m-karicheri2@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Grygorii Strashko 2020-03-24 00:52:47 +02:00 committed by David S. Miller
parent 6c0b849c47
commit 4ed59504fb
2 changed files with 20 additions and 0 deletions
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18
drivers/net/ethernet/ti/cpsw_ale.c
View File

@ -44,6 +44,8 @@
#define ALE_UNKNOWNVLAN_FORCE_UNTAG_EGRESS 0x9C
#define ALE_VLAN_MASK_MUX(reg) (0xc0 + (0x4 * (reg)))
#define AM65_CPSW_ALE_THREAD_DEF_REG 0x134
#define ALE_TABLE_WRITE BIT(31)
#define ALE_TYPE_FREE 0
@ -843,6 +845,22 @@ static struct ale_control_info ale_controls[ALE_NUM_CONTROLS] = {
.port_shift = 0,
.bits = 6,
},
[ALE_DEFAULT_THREAD_ID] = {
.name = "default_thread_id",
.offset = AM65_CPSW_ALE_THREAD_DEF_REG,
.port_offset = 0,
.shift = 0,
.port_shift = 0,
.bits = 6,
},
[ALE_DEFAULT_THREAD_ENABLE] = {
.name = "default_thread_id_enable",
.offset = AM65_CPSW_ALE_THREAD_DEF_REG,
.port_offset = 0,
.shift = 15,
.port_shift = 0,
.bits = 1,
},
};
int cpsw_ale_control_set(struct cpsw_ale *ale, int port, int control,

2
drivers/net/ethernet/ti/cpsw_ale.h
View File

@ -66,6 +66,8 @@ enum cpsw_ale_control {
ALE_PORT_MACONLY_CAF,
ALE_PORT_BCAST_LIMIT,
ALE_PORT_MCAST_LIMIT,
ALE_DEFAULT_THREAD_ID,
ALE_DEFAULT_THREAD_ENABLE,
ALE_NUM_CONTROLS,
};