intel-agp: add new chipset ID
This one adds new pci ids for Intel intergrated graphics chipset, with gtt table access change on it and new gtt table size definition. Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Airlie <airlied@linux.ie>
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@ -236,6 +236,9 @@ struct agp_bridge_data {
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#define I965_PGETBL_SIZE_512KB (0 << 1)
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#define I965_PGETBL_SIZE_256KB (1 << 1)
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#define I965_PGETBL_SIZE_128KB (2 << 1)
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#define I965_PGETBL_SIZE_1MB (3 << 1)
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#define I965_PGETBL_SIZE_2MB (4 << 1)
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#define I965_PGETBL_SIZE_1_5MB (5 << 1)
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#define G33_PGETBL_SIZE_MASK (3 << 8)
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#define G33_PGETBL_SIZE_1M (1 << 8)
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#define G33_PGETBL_SIZE_2M (2 << 8)
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@ -32,13 +32,16 @@
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#define PCI_DEVICE_ID_INTEL_Q35_IG 0x29B2
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#define PCI_DEVICE_ID_INTEL_Q33_HB 0x29D0
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#define PCI_DEVICE_ID_INTEL_Q33_IG 0x29D2
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#define PCI_DEVICE_ID_INTEL_IGD_HB 0x2A40
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#define PCI_DEVICE_ID_INTEL_IGD_IG 0x2A42
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#define IS_I965 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82946GZ_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_1_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965Q_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB)
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_HB)
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#define IS_G33 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \
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@ -461,6 +464,15 @@ static void intel_i830_init_gtt_entries(void)
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case I965_PGETBL_SIZE_512KB:
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size = 512;
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break;
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case I965_PGETBL_SIZE_1MB:
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size = 1024;
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break;
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case I965_PGETBL_SIZE_2MB:
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size = 2048;
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break;
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case I965_PGETBL_SIZE_1_5MB:
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size = 1024 + 512;
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break;
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default:
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printk(KERN_INFO PFX "Unknown page table size, "
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"assuming 512KB\n");
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@ -1124,6 +1136,7 @@ static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge)
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struct aper_size_info_fixed *size;
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int num_entries;
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u32 temp;
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int gtt_offset, gtt_size;
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size = agp_bridge->current_size;
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page_order = size->page_order;
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@ -1133,13 +1146,18 @@ static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge)
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pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
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temp &= 0xfff00000;
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intel_private.gtt = ioremap((temp + (512 * 1024)) , 512 * 1024);
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if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_HB)
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gtt_offset = gtt_size = MB(2);
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else
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gtt_offset = gtt_size = KB(512);
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intel_private.gtt = ioremap((temp + gtt_offset) , gtt_size);
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if (!intel_private.gtt)
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return -ENOMEM;
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intel_private.registers = ioremap(temp,128 * 4096);
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intel_private.registers = ioremap(temp, 128 * 4096);
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if (!intel_private.registers) {
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iounmap(intel_private.gtt);
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return -ENOMEM;
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@ -2036,6 +2054,8 @@ static const struct intel_driver_description {
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NULL, &intel_g33_driver },
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{ PCI_DEVICE_ID_INTEL_Q33_HB, PCI_DEVICE_ID_INTEL_Q33_IG, 0, "Q33",
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NULL, &intel_g33_driver },
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{ PCI_DEVICE_ID_INTEL_IGD_HB, PCI_DEVICE_ID_INTEL_IGD_IG, 0,
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"Intel Integrated Graphics Device", NULL, &intel_i965_driver },
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{ 0, 0, 0, NULL, NULL, NULL }
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};
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@ -2226,6 +2246,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
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ID(PCI_DEVICE_ID_INTEL_G33_HB),
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ID(PCI_DEVICE_ID_INTEL_Q35_HB),
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ID(PCI_DEVICE_ID_INTEL_Q33_HB),
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ID(PCI_DEVICE_ID_INTEL_IGD_HB),
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{ }
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};
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