xhci: don't re-enable IE constantly
While we're at that, define IMAN bitfield to aid readability. The interrupt enable bit should be set once on driver init, and we shouldn't need to continually re-enable it. Commitc21599a3
introduced a read of the irq_pending register, and that allows us to preserve the state of the IE bit. Before that commit, we were blindly writing 0x3 to the register. This patch should be backported to kernels as old as 2.6.36, or ones that contain the commitc21599a361
"USB: xhci: Reduce reads and writes of interrupter registers". Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Cc: stable@vger.kernel.org
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@ -2417,7 +2417,7 @@ hw_died:
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u32 irq_pending;
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/* Acknowledge the PCI interrupt */
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irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
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irq_pending |= 0x3;
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irq_pending |= IMAN_IP;
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xhci_writel(xhci, irq_pending, &xhci->ir_set->irq_pending);
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}
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@ -205,6 +205,10 @@ struct xhci_op_regs {
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#define CMD_PM_INDEX (1 << 11)
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/* bits 12:31 are reserved (and should be preserved on writes). */
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/* IMAN - Interrupt Management Register */
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#define IMAN_IP (1 << 1)
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#define IMAN_IE (1 << 0)
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/* USBSTS - USB status - status bitmasks */
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/* HC not running - set to 1 when run/stop bit is cleared. */
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#define STS_HALT XHCI_STS_HALT
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