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Staging: add Alacritech slicoss network driver 

This adds the Alacritech slicoss driver to the tree.

This driver is supposed to support:

	Mojave cards (single port PCI Gigabit) both copper and fiber
	Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
	Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber

The driver was acutally tested on Oasis and Kalahari cards.

TODO:
	- move firmware loading to request_firmware()
	- remove direct memory access of structures
	- any remaining sparse and checkpatch.pl warnings
	- any netdev recommended changes

Many thanks to Lior Dotan <liodot@gmail.com> for help with the cleanup
of this driver.

Cc: Lior Dotan <liodot@gmail.com>
Cc: Christopher Harrer <charrer@alacritech.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Greg Kroah-Hartman 2008-03-19 14:27:25 -07:00
parent cfb739b459
commit 4d6f6af8d6
18 changed files with 30782 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/staging/Kconfig
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@ -25,4 +25,6 @@ if STAGING
source "drivers/staging/et131x/Kconfig"
source "drivers/staging/slicoss/Kconfig"
endif # STAGING

1
drivers/staging/Makefile
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@ -1,3 +1,4 @@
# Makefile for staging directory
obj-$(CONFIG_ET131X) += et131x/
obj-$(CONFIG_SLICOSS) += slicoss/

14
drivers/staging/slicoss/Kconfig Normal file
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@ -0,0 +1,14 @@
config SLICOSS
tristate "Alacritech Gigabit IS-NIC support"
depends on PCI && X86 && NETDEV_1000
default n
help
This driver supports Alacritech's IS-NIC gigabit ethernet cards.
This includes the following devices:
Mojave cards (single port PCI Gigabit) both copper and fiber
Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
To compile this driver as a module, choose M here: the module
will be called slicoss.

1
drivers/staging/slicoss/Makefile Normal file
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@ -0,0 +1 @@
obj-$(CONFIG_SLICOSS) += slicoss.o

19
drivers/staging/slicoss/README Normal file
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@ -0,0 +1,19 @@
This driver is supposed to support:
Mojave cards (single port PCI Gigabit) both copper and fiber
Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
The driver was actually tested on Oasis and Kalahari cards.
TODO:
- move firmware loading to request_firmware()
- remove direct memory access of structures
- any remaining sparse and checkpatch.pl warnings
- any netdev recommended changes
Please send patches to:
Greg Kroah-Hartman <gregkh@suse.de>
and Cc: Lior Dotan <liodot@gmail.com> and Christopher Harrer
<charrer@alacritech.com> as well as they are also able to test out any
changes.

8215
drivers/staging/slicoss/gbdownload.h Normal file
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File diff suppressed because it is too large Load Diff

239
drivers/staging/slicoss/gbrcvucode.h Normal file
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@ -0,0 +1,239 @@
/*
* Copyright (c) 1997-2002 Alacritech, Inc. All rights reserved
*
* $Id: gbrcvucode.h,v 1.2 2006/03/27 15:12:15 mook Exp $
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* The views and conclusions contained in the software and documentation
* are those of the authors and should not be interpreted as representing
* official policies, either expressed or implied, of Alacritech, Inc.
*
**************************************************************************/
#define GB_RCVUCODE_VERS_STRING "$Revision: 1.2 $"
#define GB_RCVUCODE_VERS_DATE "$Date: 2006/03/27 15:12:15 $"
static ULONG GBRcvUCodeLen = 512;
static u8 GBRcvUCode[2560] =
{
0x47, 0x75, 0x01, 0x00, 0x04, 0xa0, 0x13, 0x01, 0x00, 0x1c, 0xb7, 0x5b, 0x09,
0x30, 0x00, 0xb6, 0x5f, 0x01, 0x00, 0x1c, 0x00, 0x00, 0x00, 0x20, 0x18, 0x3b,
0x78, 0x3a, 0x00, 0x1c, 0xa2, 0x77, 0x01, 0x00, 0x1c, 0x07, 0x1d, 0x01, 0x70,
0x18, 0xb3, 0x7b, 0xa9, 0xaa, 0x1e, 0xb4, 0x7b, 0x01, 0x0c, 0x1c, 0xb5, 0x7b,
0x1d, 0x06, 0x1c, 0x00, 0x00, 0x40, 0x64, 0x08, 0x0c, 0x31, 0x56, 0x70, 0x04,
0x0c, 0x31, 0x56, 0x80, 0x04, 0x0c, 0x31, 0x4a, 0x90, 0x04, 0x0c, 0x31, 0x46,
0xa0, 0x00, 0x09, 0x25, 0x51, 0xc0, 0x04, 0x0c, 0x31, 0x4e, 0xb0, 0x00, 0xe9,
0x24, 0x51, 0xc0, 0x04, 0xcc, 0xb3, 0x00, 0x1c, 0x1c, 0xeb, 0x2d, 0x01, 0x00,
0x1c, 0x06, 0x56, 0x42, 0xd4, 0x08, 0x07, 0x9d, 0x00, 0x00, 0x1c, 0x7b, 0xb7,
0x02, 0x00, 0x10, 0xa0, 0x0f, 0x41, 0x54, 0x09, 0x06, 0x56, 0x5a, 0xc0, 0x04,
0xa0, 0x30, 0x6c, 0x03, 0x00, 0xac, 0x30, 0x6d, 0x03, 0x00, 0xcd, 0x03, 0x3a,
0x00, 0x1c, 0x7b, 0xb7, 0x02, 0x00, 0x1c, 0x60, 0x8e, 0x41, 0x54, 0x09, 0x29,
0x25, 0x6d, 0x03, 0x00, 0x80, 0x8e, 0x41, 0x54, 0x09, 0x8c, 0x30, 0x8d, 0x00,
0x04, 0x47, 0x1c, 0x01, 0x00, 0x1c, 0xa0, 0x0f, 0x41, 0x54, 0x09, 0x00, 0x00,
0x60, 0x00, 0x04, 0x47, 0x1c, 0x61, 0xc0, 0x04, 0x47, 0x1c, 0x6d, 0x03, 0x00,
0x6c, 0x30, 0x01, 0x00, 0x1c, 0x4d, 0x34, 0x02, 0x00, 0x1c, 0x7b, 0xb7, 0x02,
0x00, 0x1c, 0xa0, 0x0f, 0x41, 0x54, 0x09, 0xc8, 0x83, 0x37, 0x00, 0x1c, 0x80,
0x01, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x60, 0x00, 0x04, 0xa0, 0x0f, 0x40, 0x54,
0x09, 0x00, 0x00, 0x6c, 0xc3, 0x04, 0x7b, 0xfb, 0xf2, 0x00, 0x1c, 0xcc, 0x33,
0x0d, 0x00, 0x1c, 0xb4, 0x7b, 0xfd, 0x03, 0x1c, 0x80, 0x0e, 0x40, 0x54, 0x09,
0xe0, 0xfb, 0x05, 0x00, 0x1c, 0x00, 0x00, 0xa0, 0x03, 0x00, 0xb3, 0x0f, 0x41,
0x54, 0x09, 0x00, 0x00, 0xe8, 0x70, 0x04, 0x00, 0x00, 0xe8, 0x80, 0x04, 0x00,
0x00, 0xa0, 0x93, 0x00, 0x61, 0x76, 0xa1, 0xc3, 0x04, 0xc0, 0x8d, 0x41, 0x54,
0x09, 0xe0, 0x7b, 0x00, 0xc0, 0x1f, 0xa0, 0xfd, 0xc1, 0x01, 0x00, 0xcc, 0x33,
0x05, 0x00, 0x1c, 0xd4, 0x03, 0x00, 0x3c, 0x1c, 0xd4, 0xd3, 0x1b, 0x00, 0x1c,
0xc0, 0xd3, 0x52, 0x00, 0x1c, 0x00, 0x00, 0x74, 0x13, 0x04, 0x8e, 0x8e, 0x42,
0x54, 0x09, 0x5b, 0x80, 0x76, 0x13, 0x04, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00,
0x00, 0x90, 0x01, 0x00, 0xa0, 0x0f, 0x41, 0x54, 0x09, 0xa0, 0x0f, 0x41, 0x54,
0x09, 0xc0, 0x03, 0xfc, 0x7f, 0x1c, 0xa0, 0x01, 0x9c, 0x01, 0x00, 0x00, 0x00,
0xa0, 0x01, 0x00, 0xa0, 0x0f, 0x41, 0x54, 0x09, 0xc0, 0x03, 0xfc, 0x03, 0x1c,
0xf5, 0x77, 0x01, 0x00, 0x1c, 0x26, 0x7a, 0xf6, 0x05, 0x1c, 0xa0, 0x0f, 0x41,
0x54, 0x09, 0xb3, 0x0f, 0x41, 0x54, 0x09, 0xb5, 0x02, 0x02, 0x00, 0x1c, 0xa0,
0x0f, 0x41, 0x54, 0x09, 0x7a, 0x06, 0x02, 0x00, 0x1c, 0xb5, 0x02, 0x02, 0x00,
0x1c, 0x53, 0x0f, 0x42, 0x54, 0x09, 0xaf, 0x03, 0x01, 0x00, 0x1c, 0x7a, 0x0e,
0x42, 0x54, 0x09, 0xb5, 0x02, 0x02, 0x00, 0x1c, 0x00, 0x00, 0x02, 0x00, 0x1c,
0xa0, 0x3d, 0xa6, 0x11, 0x04, 0x00, 0x00, 0xa8, 0x11, 0x04, 0xd4, 0xd3, 0x52,
0x00, 0x1c, 0xb5, 0x3e, 0xae, 0x01, 0x00, 0x20, 0xfb, 0xfd, 0xff, 0x1f, 0x80,
0x2c, 0x84, 0x03, 0x00, 0xb9, 0x3a, 0x9a, 0x01, 0x00, 0x75, 0x3b, 0x02, 0x00,
0x1c, 0xa7, 0x1c, 0x01, 0x00, 0x10, 0xdb, 0x83, 0x16, 0x00, 0x1c, 0xc7, 0x1d,
0x1d, 0xc1, 0x04, 0xb9, 0x3b, 0x89, 0xc1, 0x04, 0x8b, 0x2c, 0x01, 0x00, 0x1c,
0x6b, 0x2c, 0x31, 0xc1, 0x04, 0x00, 0x00, 0x74, 0x11, 0x00, 0xcb, 0x2c, 0x75,
0xc1, 0x04, 0xa0, 0x0f, 0x41, 0x54, 0x09, 0xa0, 0x0f, 0x41, 0x54, 0x09, 0x54,
0xd0, 0x02, 0x00, 0x1c, 0x49, 0x25, 0xad, 0x01, 0x00, 0xab, 0x2c, 0x7d, 0xc1,
0x04, 0xa7, 0x1d, 0x6d, 0x03, 0x00, 0xcc, 0x33, 0x09, 0x00, 0x1c, 0xeb, 0x2d,
0x01, 0x00, 0x1c, 0xea, 0x29, 0x01, 0x00, 0x1c, 0xa0, 0x0f, 0x41, 0x54, 0x09,
0xae, 0x0f, 0x41, 0x54, 0x09, 0xa0, 0x0f, 0x41, 0x54, 0x09, 0xd4, 0x07, 0xfc,
0x03, 0x1c, 0x99, 0x3a, 0x02, 0x00, 0x1c, 0xbb, 0x38, 0x02, 0x00, 0x1c, 0x00,
0x38, 0x00, 0x00, 0x1c, 0x00, 0x00, 0xf8, 0x01, 0x04, 0xdb, 0x3b, 0x7e, 0x00,
0x1c, 0xc7, 0x1d, 0x01, 0x00, 0x1c, 0x26, 0x7a, 0x0a, 0x06, 0x1c, 0x27, 0x1d,
0x01, 0x00, 0x1c, 0xb3, 0x0f, 0x41, 0x54, 0x09, 0x7a, 0x0e, 0x42, 0x54, 0x09,
0x53, 0x0f, 0x42, 0x54, 0x09, 0x7a, 0x0e, 0x42, 0x54, 0x09, 0x53, 0x0f, 0x42,
0x54, 0x09, 0x7a, 0x0e, 0x42, 0x54, 0x09, 0x53, 0x0f, 0x42, 0x54, 0x09, 0xa0,
0x0f, 0x41, 0x54, 0x09, 0x7a, 0x06, 0x02, 0x00, 0x1c, 0x53, 0x0f, 0x42, 0x54,
0x09, 0xaf, 0x03, 0x01, 0x00, 0x1c, 0x7a, 0x0e, 0x42, 0x54, 0x09, 0x53, 0x0f,
0x42, 0x54, 0x09, 0x7a, 0x0e, 0x42, 0x54, 0x09, 0x53, 0x0f, 0x42, 0x54, 0x09,
0x7a, 0x0e, 0x42, 0x54, 0x09, 0x53, 0x0f, 0x42, 0x54, 0x09, 0x7a, 0x0e, 0x42,
0x54, 0x09, 0x00, 0x3d, 0x02, 0x00, 0x1c, 0x00, 0x00, 0x54, 0x12, 0x00, 0xcb,
0x2c, 0x01, 0x00, 0x1c, 0x75, 0x3b, 0x02, 0x00, 0x1c, 0xa7, 0x1c, 0x01, 0x00,
0x10, 0xa6, 0x7b, 0xf1, 0x05, 0x1c, 0x00, 0x00, 0x88, 0xc2, 0x04, 0xa6, 0x7b,
0xf1, 0x05, 0x1c, 0x00, 0x00, 0xa0, 0xc2, 0x04, 0xcb, 0x2f, 0x05, 0x00, 0x1c,
0x60, 0x2c, 0x00, 0x00, 0x1c, 0xc7, 0x1c, 0xe1, 0x02, 0x00, 0x53, 0x0f, 0x42,
0x54, 0x09, 0xc0, 0x83, 0xf1, 0x32, 0x1c, 0x00, 0x00, 0x5c, 0x02, 0x04, 0x46,
0x7a, 0xda, 0x05, 0x1c, 0x7a, 0x0e, 0x42, 0x54, 0x09, 0xc0, 0x83, 0xf1, 0x32,
0x1c, 0x00, 0x00, 0x64, 0x02, 0x04, 0x40, 0xfa, 0x15, 0x00, 0x1c, 0x00, 0x00,
0xa0, 0x02, 0x04, 0x46, 0x7a, 0xda, 0x05, 0x1c, 0xa0, 0x0f, 0x41, 0x54, 0x09,
0xa0, 0x0f, 0x41, 0x54, 0x09, 0xa0, 0x0f, 0x41, 0x54, 0x09, 0xa0, 0x0f, 0x41,
0x54, 0x09, 0xb3, 0x7b, 0x01, 0xc0, 0x1f, 0x74, 0x0e, 0x40, 0x54, 0x09, 0xc0,
0x03, 0x9c, 0x00, 0x1c, 0x80, 0x00, 0xf0, 0x02, 0x00, 0x00, 0x00, 0xf0, 0x02,
0x04, 0x00, 0x00, 0xc4, 0x12, 0x05, 0x07, 0x1d, 0x01, 0x00, 0x1c, 0xd4, 0xd3,
0x2b, 0x00, 0x1c, 0xd4, 0xd3, 0x52, 0x00, 0x1c, 0x80, 0x76, 0x95, 0x13, 0x04,
0x00, 0x00, 0xf8, 0x02, 0x00, 0xa6, 0x7b, 0xa9, 0x03, 0x10, 0xc7, 0x9c, 0x00,
0x00, 0x1c, 0x80, 0x2c, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x78, 0x02, 0x04, 0x00,
0x00, 0x6c, 0xc3, 0x04, 0xab, 0x2d, 0xf1, 0x12, 0x05, 0x07, 0x1d, 0xcd, 0xc2,
0x04, 0x8b, 0x2d, 0x01, 0x00, 0x1c, 0x69, 0x25, 0x01, 0x00, 0x1c, 0xa6, 0x7b,
0xa9, 0x03, 0x10, 0xcb, 0x2f, 0x09, 0x00, 0x1c, 0x60, 0x2c, 0x00, 0x00, 0x1c,
0x00, 0x00, 0x60, 0x03, 0x00, 0x53, 0x0f, 0x42, 0x54, 0x09, 0x46, 0x7a, 0xda,
0x05, 0x1c, 0x7a, 0x0e, 0x42, 0x54, 0x09, 0x40, 0xfa, 0x15, 0x00, 0x1c, 0x00,
0x00, 0x28, 0x03, 0x04, 0x46, 0x7a, 0xda, 0x05, 0x1c, 0xb5, 0x0f, 0x41, 0x54,
0x09, 0xa0, 0x0f, 0x41, 0x54, 0x09, 0x73, 0xec, 0x42, 0x03, 0x04, 0x60, 0x2c,
0x00, 0x00, 0x1c, 0x00, 0x00, 0x40, 0x03, 0x00, 0xc7, 0x1c, 0x01, 0x00, 0x1c,
0x00, 0x00, 0x40, 0x13, 0x05, 0x07, 0x1d, 0x01, 0x00, 0x1c, 0xc0, 0xd7, 0x22,
0x00, 0x1c, 0x75, 0x56, 0x96, 0x13, 0x04, 0x60, 0x2c, 0x00, 0x00, 0x1c, 0xe7,
0x1c, 0x5d, 0x03, 0x04, 0xe7, 0x9c, 0x00, 0x00, 0x1c, 0xa6, 0x7b, 0xa9, 0x03,
0x10, 0x80, 0x2c, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x10, 0x03, 0x04, 0x00, 0x00,
0x6c, 0xc3, 0x04, 0xb9, 0x7b, 0x01, 0x00, 0x1c, 0x00, 0x00, 0xa0, 0xc3, 0x04,
0xcb, 0xaf, 0xfc, 0x07, 0x1c, 0xcb, 0x2f, 0x01, 0x04, 0x1c, 0xc7, 0x9f, 0x80,
0x03, 0x1c, 0x00, 0x00, 0xa0, 0xc3, 0x04, 0xcb, 0xaf, 0xfc, 0x07, 0x1c, 0xcb,
0x2f, 0x0d, 0x04, 0x1c, 0xc7, 0x9f, 0x80, 0x03, 0x1c, 0x00, 0x00, 0xa0, 0xc3,
0x04, 0xcb, 0xaf, 0x00, 0xf8, 0x1d, 0xcb, 0x2f, 0x01, 0x00, 0x1d, 0x00, 0x00,
0xa0, 0xc3, 0x04, 0x00, 0x00, 0xa0, 0x13, 0x05, 0x07, 0x1d, 0x01, 0x00, 0x1c,
0xc0, 0x1d, 0xf0, 0xd3, 0x08, 0x27, 0x9d, 0xf8, 0x03, 0x00, 0xa0, 0xee, 0x56,
0xd4, 0x00, 0xfb, 0x75, 0x19, 0x14, 0x04, 0x20, 0x7b, 0x06, 0x00, 0x1c, 0xc0,
0x1c, 0x2c, 0x04, 0x00, 0x00, 0x00, 0xc4, 0xd3, 0x08, 0x00, 0x00, 0x10, 0xf4,
0x00, 0xc0, 0xef, 0xf2, 0x00, 0x1c, 0x20, 0x25, 0x6c, 0x14, 0x04, 0x60, 0xb7,
0xe6, 0x03, 0x00, 0x00, 0x00, 0x1c, 0x15, 0x00, 0xcc, 0xb3, 0xfc, 0x03, 0x1c,
0xcc, 0x33, 0x05, 0x02, 0x1c, 0x00, 0x00, 0x1c, 0xc5, 0x04, 0x60, 0xb7, 0x1e,
0x05, 0x04, 0x00, 0x00, 0x1c, 0x15, 0x04, 0x00, 0x00, 0x6c, 0xc4, 0x04, 0xc0,
0x1d, 0xac, 0xf3, 0x04, 0x00, 0x00, 0x78, 0xc4, 0x04, 0x07, 0x9d, 0x00, 0x00,
0x1c, 0x1b, 0x74, 0x0d, 0xf4, 0x04, 0xa0, 0x0f, 0x41, 0x54, 0x09, 0xe0, 0x7b,
0x00, 0xfc, 0x1f, 0x39, 0x7f, 0x02, 0x00, 0x1c, 0x07, 0x1d, 0xb1, 0xc3, 0x04,
0xa6, 0x7b, 0xc1, 0x03, 0x1c, 0x00, 0x00, 0x78, 0xc4, 0x04, 0xe0, 0x1c, 0x00,
0x00, 0x1c, 0x00, 0x00, 0xb8, 0x03, 0x04, 0xcb, 0xaf, 0x00, 0xf8, 0x1d, 0xcb,
0x2f, 0x01, 0x10, 0x1d, 0x00, 0x00, 0xc0, 0xc3, 0x04, 0x00, 0x00, 0xc0, 0x03,
0x04, 0xcb, 0xaf, 0x00, 0xf8, 0x1d, 0xcb, 0x2f, 0x01, 0x18, 0x1d, 0xc7, 0x9f,
0x00, 0x0b, 0x1c, 0x00, 0x00, 0xc0, 0xc3, 0x04, 0xfb, 0x75, 0x01, 0x00, 0x1c,
0x07, 0x1d, 0x01, 0x00, 0x1c, 0xcc, 0xb3, 0xfc, 0x03, 0x1c, 0xcc, 0x33, 0x01,
0x02, 0x1c, 0x00, 0x00, 0xc0, 0xc3, 0x04, 0xa0, 0x1c, 0x00, 0x00, 0x1c, 0xa0,
0xee, 0xb6, 0x03, 0x04, 0xcb, 0xaf, 0xfc, 0x07, 0x1c, 0xcb, 0x2f, 0x09, 0x04,
0x1c, 0xfb, 0x75, 0x01, 0x00, 0x1c, 0x00, 0x00, 0xc0, 0xc3, 0x04, 0xcc, 0xb3,
0xfc, 0x03, 0x1c, 0xcc, 0x33, 0x01, 0x02, 0x1c, 0x00, 0x00, 0x1c, 0xc5, 0x04,
0x00, 0x00, 0x88, 0x34, 0x05, 0xcc, 0xb3, 0xfc, 0x03, 0x1c, 0xcc, 0x33, 0x15,
0x02, 0x1c, 0x47, 0x9d, 0x64, 0xc4, 0x04, 0x00, 0x00, 0x88, 0x44, 0x00, 0x80,
0x1d, 0x8c, 0x54, 0x04, 0x87, 0x1d, 0x9d, 0x04, 0x00, 0xce, 0x76, 0x01, 0x00,
0x1c, 0xef, 0x76, 0xad, 0xc4, 0x04, 0xa4, 0x77, 0x9d, 0x24, 0x09, 0xe4, 0x76,
0x01, 0x00, 0x1c, 0xc4, 0x76, 0x01, 0x00, 0x1c, 0x00, 0x00, 0xa8, 0x54, 0x04,
0xd7, 0x76, 0x01, 0x50, 0x18, 0xf6, 0x76, 0x01, 0x00, 0x1c, 0x00, 0x00, 0x00,
0x30, 0x18, 0x00, 0x00, 0x00, 0x00, 0x10, 0xcc, 0x30, 0x51, 0xc5, 0x04, 0xeb,
0x2d, 0x01, 0x00, 0x1c, 0xea, 0x29, 0x01, 0x00, 0x1c, 0xc0, 0x59, 0x01, 0x00,
0x1c, 0xf5, 0x77, 0x39, 0xc5, 0x04, 0xe0, 0x30, 0xec, 0x04, 0x00, 0x00, 0x4c,
0xc0, 0x04, 0x00, 0x20, 0x4c, 0x04, 0x05, 0x00, 0x00, 0x00, 0xf8, 0x04, 0x00,
0xcc, 0xb3, 0xfc, 0x03, 0x1c, 0xcc, 0x33, 0x09, 0x02, 0x1c, 0xeb, 0x2d, 0xc5,
0xc4, 0x04, 0xcc, 0xb3, 0xfc, 0x03, 0x1c, 0xcc, 0x33, 0x19, 0x02, 0x1c, 0xeb,
0x2d, 0xc5, 0xc4, 0x04, 0xcc, 0xb3, 0xfc, 0x03, 0x1c, 0xcc, 0x33, 0x0d, 0x02,
0x1c, 0xeb, 0x2d, 0xc5, 0xc4, 0x04, 0xcc, 0xb3, 0xfc, 0x03, 0x1c, 0xcc, 0x33,
0x11, 0x02, 0x1c, 0xeb, 0x2d, 0xc5, 0xc4, 0x04, 0x00, 0x7b, 0x00, 0x80, 0x1c,
0xae, 0x77, 0x51, 0x05, 0x00, 0x00, 0x00, 0x04, 0xc0, 0x04, 0xd3, 0x8b, 0x00,
0xfc, 0x1f, 0x60, 0x7a, 0x3c, 0x00, 0x1c, 0x60, 0x4c, 0xd0, 0x04, 0x00, 0xc0,
0x2f, 0x20, 0x05, 0x1f, 0xe0, 0x30, 0xc0, 0x04, 0x00, 0x80, 0x25, 0xc0, 0x04,
0x00, 0xb5, 0x5b, 0xc1, 0x04, 0x04, 0x69, 0x26, 0x01, 0x00, 0x1c, 0x6a, 0x2b,
0x01, 0x00, 0x1c, 0x80, 0x1d, 0x00, 0x00, 0x1c, 0xa9, 0x25, 0x51, 0x05, 0x00,
0xee, 0x30, 0x00, 0x00, 0x1c, 0xaf, 0x77, 0x11, 0x05, 0x00, 0xb4, 0x5f, 0x01,
0x40, 0x18, 0x07, 0x9d, 0x54, 0x55, 0x04, 0xb7, 0x76, 0x01, 0x00, 0x1c, 0x96,
0x76, 0x01, 0x00, 0x1c, 0x47, 0x1d, 0x01, 0x00, 0x1c, 0xa4, 0x33, 0x01, 0x60,
0x18, 0xa4, 0x2f, 0x01, 0x60, 0x18, 0x64, 0x77, 0x01, 0x60, 0x18, 0x24, 0x77,
0x01, 0x60, 0x18, 0x44, 0x77, 0x01, 0x00, 0x1c, 0x64, 0x88, 0x03, 0x00, 0x1c,
0xa4, 0x3f, 0x01, 0x00, 0x1c, 0xa4, 0x3b, 0x01, 0x00, 0x1c, 0x53, 0x77, 0x01,
0x00, 0x1c, 0xd3, 0xcf, 0x3b, 0x00, 0x1c, 0x53, 0x4f, 0x02, 0x00, 0x1c, 0xd3,
0xcf, 0x00, 0x00, 0x1f, 0xda, 0xcf, 0x0b, 0x00, 0x1c, 0xd5, 0x57, 0x0f, 0x00,
0x1c, 0xd3, 0xd3, 0x37, 0x00, 0x1c, 0xd4, 0x53, 0x0f, 0x00, 0x1c, 0xe0, 0x29,
0x00, 0x00, 0x1c, 0xf5, 0xd5, 0xc0, 0x05, 0x00, 0x00, 0x00, 0xac, 0x55, 0x04,
0x77, 0x56, 0x01, 0x00, 0x1c, 0x56, 0x53, 0x01, 0x00, 0x1c, 0x00, 0x00, 0x00,
0x10, 0x18, 0x00, 0x00, 0x04, 0xc0, 0x04, 0xf5, 0x55, 0x01, 0x00, 0x1c, 0x00,
0x00, 0xc4, 0x55, 0x04, 0x77, 0x56, 0x01, 0x00, 0x1c, 0x56, 0x53, 0x01, 0x00,
0x1c, 0x00, 0x00, 0x00, 0x10, 0x18, 0x00, 0x00, 0x04, 0xc0, 0x04, 0xcb, 0x2f,
0x01, 0x18, 0x10, 0xcb, 0x2f, 0x01, 0x10, 0x10, 0xcb, 0x2f, 0x01, 0x08, 0x10,
0xcb, 0x2f, 0x01, 0x08, 0x10, 0xcb, 0x2f, 0x01, 0x20, 0x10, 0xcb, 0x2f, 0x01,
0x00, 0x10, 0xcb, 0x2f, 0x01, 0x28, 0x10, 0x89, 0x25, 0x6d, 0xc2, 0x04, 0x00,
0x00, 0x04, 0xc3, 0x04, 0x00, 0x00, 0x6c, 0xc3, 0x04, 0x00, 0x00, 0x6c, 0xc3,
0x04, 0x00, 0x00, 0x6c, 0xc3, 0x04, 0x00, 0x00, 0x6c, 0xc2, 0x04, 0x00, 0x00,
0x04, 0xc3, 0x04, 0x00, 0x00, 0x6c, 0xc3, 0x04, 0x00, 0x00, 0x6c, 0xc3, 0x04,
0x00, 0x00, 0x6c, 0xc3, 0x04, 0x40, 0x1c, 0x68, 0xc0, 0x04, 0x40, 0x1c, 0x98,
0xc0, 0x04, 0xa7, 0x77, 0x6d, 0xc3, 0x04, 0x00, 0x00, 0xc0, 0xc0, 0x04, 0x27,
0x1d, 0xed, 0xc0, 0x04, 0x00, 0x00, 0x6c, 0xc3, 0x04, 0x00, 0x00, 0x6c, 0xc3,
0x04, 0x00, 0x00, 0x6c, 0xc3, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00,
0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04,
0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c,
0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00,
0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6,
0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00,
0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04,
0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c,
0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00,
0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6,
0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00,
0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04,
0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c,
0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00,
0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6,
0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00,
0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04,
0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c,
0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00,
0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6,
0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00,
0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04,
0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c,
0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00,
0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6,
0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00,
0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04,
0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c,
0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00,
0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6,
0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00,
0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04,
0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c,
0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00,
0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6,
0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00,
0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04,
0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c,
0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00,
0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6,
0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00,
0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04,
0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c,
0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04, 0x00, 0x00, 0x3c, 0xc6, 0x04,
};

6850
drivers/staging/slicoss/oasisdbgdownload.h Normal file
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6848
drivers/staging/slicoss/oasisdownload.h Normal file
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File diff suppressed because it is too large Load Diff

205
drivers/staging/slicoss/oasisrcvucode.h Normal file
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@ -0,0 +1,205 @@
#define OASIS_RCVUCODE_VERS_STRING "$Revision: 1.2 $"
#define OASIS_RCVUCODE_VERS_DATE "$Date: 2006/03/27 15:10:28 $"
static ULONG OasisRcvUCodeLen = 512;
static u8 OasisRcvUCode[2560] =
{
0x47, 0x75, 0x01, 0x00, 0x04, 0xa0, 0x13, 0x01, 0x00, 0x1c, 0xb7, 0x5b, 0x09,
0x30, 0x00, 0xb6, 0x5f, 0x01, 0x00, 0x1c, 0x00, 0x00, 0x00, 0x20, 0x18, 0x3b,
0x78, 0x3a, 0x00, 0x1c, 0xa2, 0x77, 0x01, 0x00, 0x1c, 0x07, 0x1d, 0x01, 0x70,
0x18, 0xad, 0x7b, 0xf1, 0xff, 0x1c, 0xb3, 0x7b, 0xa9, 0xaa, 0x1e, 0xb4, 0x7b,
0x01, 0x0c, 0x1c, 0xb5, 0x7b, 0x0d, 0x06, 0x1c, 0x00, 0x00, 0x30, 0x64, 0x08,
0x0c, 0x31, 0x5a, 0x70, 0x04, 0x0c, 0x31, 0x5a, 0x80, 0x04, 0x0c, 0x31, 0x4e,
0x90, 0x04, 0x0c, 0x31, 0x4a, 0xa0, 0x00, 0x09, 0x25, 0x55, 0xc0, 0x04, 0x0c,
0x31, 0x52, 0xb0, 0x00, 0xe9, 0x24, 0x55, 0xc0, 0x04, 0xcc, 0xb3, 0x00, 0x1c,
0x1c, 0xeb, 0x2d, 0x01, 0x00, 0x1c, 0x06, 0x56, 0x32, 0xd4, 0x08, 0x07, 0x9d,
0x00, 0x00, 0x1c, 0x7b, 0xb7, 0x02, 0x00, 0x10, 0xa0, 0x0f, 0x31, 0x54, 0x09,
0x06, 0x56, 0x5e, 0xc0, 0x04, 0xa0, 0x30, 0x54, 0x03, 0x00, 0xac, 0x30, 0x55,
0x03, 0x00, 0xcd, 0x03, 0x3a, 0x00, 0x1c, 0x7b, 0xb7, 0x02, 0x00, 0x1c, 0x60,
0x8e, 0x31, 0x54, 0x09, 0x29, 0x25, 0x55, 0x03, 0x00, 0x80, 0x8e, 0x31, 0x54,
0x09, 0x8c, 0x30, 0x91, 0x00, 0x04, 0x47, 0x1c, 0x01, 0x00, 0x1c, 0xa0, 0x0f,
0x31, 0x54, 0x09, 0x00, 0x00, 0x64, 0x00, 0x04, 0x47, 0x1c, 0x65, 0xc0, 0x04,
0x47, 0x1c, 0x55, 0x03, 0x00, 0x6c, 0x30, 0x01, 0x00, 0x1c, 0x4d, 0x34, 0x02,
0x00, 0x1c, 0x7b, 0xb7, 0x02, 0x00, 0x1c, 0xa0, 0x0f, 0x31, 0x54, 0x09, 0xc8,
0x83, 0x37, 0x00, 0x1c, 0x80, 0x01, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x64, 0x00,
0x04, 0xa0, 0x0f, 0x30, 0x54, 0x09, 0x00, 0x00, 0x54, 0xc3, 0x04, 0x7b, 0xfb,
0xf2, 0x00, 0x1c, 0xcc, 0x33, 0x0d, 0x00, 0x1c, 0xb4, 0x7b, 0xfd, 0x03, 0x1c,
0x80, 0x0e, 0x30, 0x54, 0x09, 0xe0, 0xfb, 0x05, 0x00, 0x1c, 0x00, 0x00, 0x8c,
0x03, 0x00, 0xb3, 0x0f, 0x31, 0x54, 0x09, 0x00, 0x00, 0xec, 0x70, 0x04, 0x00,
0x00, 0xec, 0x80, 0x04, 0x00, 0x00, 0x8c, 0x93, 0x00, 0x61, 0x76, 0x8d, 0xc3,
0x04, 0xc0, 0x8d, 0x31, 0x54, 0x09, 0xe0, 0x7b, 0x00, 0xc0, 0x1f, 0xa0, 0xfd,
0xc5, 0x01, 0x00, 0xcc, 0x33, 0x05, 0x00, 0x1c, 0xd4, 0x03, 0x00, 0x3c, 0x1c,
0xd4, 0xd3, 0x1b, 0x00, 0x1c, 0xc0, 0xd3, 0x52, 0x00, 0x1c, 0x00, 0x00, 0x5c,
0x13, 0x04, 0x8e, 0x8e, 0x32, 0x54, 0x09, 0x5b, 0x80, 0x5e, 0x13, 0x04, 0x00,
0x00, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x94, 0x01, 0x00, 0xa0, 0x0f, 0x31, 0x54,
0x09, 0xa0, 0x0f, 0x31, 0x54, 0x09, 0xc0, 0x03, 0xfc, 0x7f, 0x1c, 0xa0, 0x01,
0xa0, 0x01, 0x00, 0x00, 0x00, 0xa4, 0x01, 0x00, 0xa0, 0x0f, 0x31, 0x54, 0x09,
0xc0, 0x03, 0xfc, 0x03, 0x1c, 0xf5, 0x77, 0x01, 0x00, 0x1c, 0x26, 0x7a, 0xe6,
0x05, 0x1c, 0xa0, 0x0f, 0x31, 0x54, 0x09, 0xb3, 0x0f, 0x31, 0x54, 0x09, 0xb5,
0x02, 0x02, 0x00, 0x1c, 0xa0, 0x0f, 0x31, 0x54, 0x09, 0x7a, 0x7e, 0x02, 0x00,
0x1c, 0xb5, 0x02, 0x02, 0x00, 0x1c, 0x53, 0x0f, 0x32, 0x54, 0x09, 0xaf, 0x03,
0x01, 0x00, 0x1c, 0x7a, 0x0e, 0x32, 0x54, 0x09, 0xb5, 0x02, 0x02, 0x00, 0x1c,
0x00, 0x00, 0x02, 0x00, 0x1c, 0xa0, 0x3d, 0xaa, 0x11, 0x04, 0x00, 0x00, 0xac,
0x11, 0x04, 0xd4, 0xd3, 0x52, 0x00, 0x1c, 0xb5, 0x3e, 0xb2, 0x01, 0x00, 0x20,
0xfb, 0xfd, 0xff, 0x1f, 0x80, 0x2c, 0x6c, 0x03, 0x00, 0xb9, 0x3a, 0x9e, 0x01,
0x00, 0x75, 0x3b, 0x02, 0x00, 0x1c, 0xa7, 0x1c, 0x01, 0x00, 0x10, 0xdb, 0x83,
0x16, 0x00, 0x1c, 0xc7, 0x1d, 0x21, 0xc1, 0x04, 0xb9, 0x3b, 0x8d, 0xc1, 0x04,
0x8b, 0x2c, 0x01, 0x00, 0x1c, 0x6b, 0x2c, 0x35, 0xc1, 0x04, 0x00, 0x00, 0x78,
0x11, 0x00, 0xcb, 0x2c, 0x79, 0xc1, 0x04, 0xa0, 0x0f, 0x31, 0x54, 0x09, 0xa0,
0x0f, 0x31, 0x54, 0x09, 0x54, 0xd0, 0x02, 0x00, 0x1c, 0x49, 0x25, 0xb1, 0x01,
0x00, 0xab, 0x2c, 0x81, 0xc1, 0x04, 0xa7, 0x1d, 0x55, 0x03, 0x00, 0xcc, 0x33,
0x09, 0x00, 0x1c, 0xeb, 0x2d, 0x01, 0x00, 0x1c, 0xea, 0x29, 0x01, 0x00, 0x1c,
0xa0, 0x0f, 0x31, 0x54, 0x09, 0xae, 0x0f, 0x31, 0x54, 0x09, 0xa0, 0x0f, 0x31,
0x54, 0x09, 0xd4, 0x07, 0xfc, 0x03, 0x1c, 0x99, 0x3a, 0x02, 0x00, 0x1c, 0xbb,
0x38, 0x02, 0x00, 0x1c, 0x00, 0x38, 0x00, 0x00, 0x1c, 0x00, 0x00, 0xfc, 0x01,
0x04, 0xdb, 0x3b, 0x7e, 0x00, 0x1c, 0xc7, 0x1d, 0x01, 0x00, 0x1c, 0x26, 0x7a,
0xfa, 0x05, 0x1c, 0x27, 0x1d, 0x01, 0x00, 0x1c, 0xb3, 0x0f, 0x31, 0x54, 0x09,
0x7a, 0x0e, 0x32, 0x54, 0x09, 0x53, 0x0f, 0x32, 0x54, 0x09, 0x7a, 0x0e, 0x32,
0x54, 0x09, 0x53, 0x0f, 0x32, 0x54, 0x09, 0x7a, 0x0e, 0x32, 0x54, 0x09, 0x53,
0x0f, 0x32, 0x54, 0x09, 0xa0, 0x0f, 0x31, 0x54, 0x09, 0x7a, 0x06, 0x02, 0x00,
0x1c, 0x53, 0x0f, 0x32, 0x54, 0x09, 0xaf, 0x03, 0x01, 0x00, 0x1c, 0x7a, 0x0e,
0x32, 0x54, 0x09, 0x53, 0x0f, 0x32, 0x54, 0x09, 0x7a, 0x0e, 0x32, 0x54, 0x09,
0x53, 0x0f, 0x32, 0x54, 0x09, 0x7a, 0x0e, 0x32, 0x54, 0x09, 0x53, 0x0f, 0x32,
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};

603
drivers/staging/slicoss/slic.h Normal file
View File

@ -0,0 +1,603 @@
/**************************************************************************
*
* Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved.
*
* $Id: slic.h,v 1.3 2006/07/14 16:43:02 mook Exp $
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* The views and conclusions contained in the software and documentation
* are those of the authors and should not be interpreted as representing
* official policies, either expressed or implied, of Alacritech, Inc.
*
**************************************************************************/
/*
* FILENAME: slic.h
*
* This is the base set of header definitions for the SLICOSS driver.
*/
#ifndef __SLIC_DRIVER_H__
#define __SLIC_DRIVER_H__
struct slic_spinlock {
spinlock_t lock;
unsigned long flags;
};
#define SLIC_RSPQ_PAGES_GB 10
#define SLIC_RSPQ_BUFSINPAGE (PAGE_SIZE / SLIC_RSPBUF_SIZE)
typedef struct _slic_rspqueue_t {
ulong32 offset;
ulong32 pageindex;
ulong32 num_pages;
p_slic_rspbuf_t rspbuf;
pulong32 vaddr[SLIC_RSPQ_PAGES_GB];
dma_addr_t paddr[SLIC_RSPQ_PAGES_GB];
} slic_rspqueue_t, *p_slic_rspqueue_t;
#define SLIC_RCVQ_EXPANSION 1
#define SLIC_RCVQ_ENTRIES (256 * SLIC_RCVQ_EXPANSION)
#define SLIC_RCVQ_MINENTRIES (SLIC_RCVQ_ENTRIES / 2)
#define SLIC_RCVQ_MAX_PROCESS_ISR ((SLIC_RCVQ_ENTRIES * 4))
#define SLIC_RCVQ_RCVBUFSIZE 2048
#define SLIC_RCVQ_FILLENTRIES (16 * SLIC_RCVQ_EXPANSION)
#define SLIC_RCVQ_FILLTHRESH (SLIC_RCVQ_ENTRIES - SLIC_RCVQ_FILLENTRIES)
typedef struct _slic_rcvqueue_t {
struct sk_buff *head;
struct sk_buff *tail;
ulong32 count;
ulong32 size;
ulong32 errors;
} slic_rcvqueue_t, *p_slic_rcvqueue_t;
typedef struct _slic_rcvbuf_info_t {
ulong32 id;
ulong32 starttime;
ulong32 stoptime;
ulong32 slicworld;
ulong32 lasttime;
ulong32 lastid;
} slic_rcvbuf_info_t, *pslic_rcvbuf_info_t;
/*
SLIC Handle structure. Used to restrict handle values to
32 bits by using an index rather than an address.
Simplifies ucode in 64-bit systems
*/
typedef struct _slic_handle_word_t {
union {
struct {
ushort index;
ushort bottombits; /* to denote num bufs to card */
} parts;
ulong32 whole;
} handle;
} slic_handle_word_t, *pslic_handle_word_t;
typedef struct _slic_handle_t {
slic_handle_word_t token; /* token passed between host and card*/
ushort type;
pvoid address; /* actual address of the object*/
ushort offset;
struct _slic_handle_t *other_handle;
struct _slic_handle_t *next;
} slic_handle_t, *pslic_handle_t;
#define SLIC_HANDLE_FREE 0x0000
#define SLIC_HANDLE_DATA 0x0001
#define SLIC_HANDLE_CMD 0x0002
#define SLIC_HANDLE_CONTEXT 0x0003
#define SLIC_HANDLE_TEAM 0x0004
#define handle_index handle.parts.index
#define handle_bottom handle.parts.bottombits
#define handle_token handle.whole
#define SLIC_HOSTCMD_SIZE 512
typedef struct _slic_hostcmd_t {
slic_host64_cmd_t cmd64;
ulong32 type;
struct sk_buff *skb;
ulong32 paddrl;
ulong32 paddrh;
ulong32 busy;
ulong32 cmdsize;
ushort numbufs;
pslic_handle_t pslic_handle;/* handle associated with command */
struct _slic_hostcmd_t *next;
struct _slic_hostcmd_t *next_all;
} slic_hostcmd_t, *p_slic_hostcmd_t;
#define SLIC_CMDQ_CMDSINPAGE (PAGE_SIZE / SLIC_HOSTCMD_SIZE)
#define SLIC_CMD_DUMB 3
#define SLIC_CMDQ_INITCMDS 256
#define SLIC_CMDQ_MAXCMDS 256
#define SLIC_CMDQ_MAXOUTSTAND SLIC_CMDQ_MAXCMDS
#define SLIC_CMDQ_MAXPAGES (SLIC_CMDQ_MAXCMDS / SLIC_CMDQ_CMDSINPAGE)
#define SLIC_CMDQ_INITPAGES (SLIC_CMDQ_INITCMDS / SLIC_CMDQ_CMDSINPAGE)
typedef struct _slic_cmdqmem_t {
int pagecnt;
pulong32 pages[SLIC_CMDQ_MAXPAGES];
dma_addr_t dma_pages[SLIC_CMDQ_MAXPAGES];
} slic_cmdqmem_t, *p_slic_cmdqmem_t;
typedef struct _slic_cmdqueue_t {
p_slic_hostcmd_t head;
p_slic_hostcmd_t tail;
int count;
struct slic_spinlock lock;
} slic_cmdqueue_t, *p_slic_cmdqueue_t;
#ifdef STATUS_SUCCESS
#undef STATUS_SUCCESS
#endif
#define STATUS_SUCCESS 0
#define STATUS_PENDING 0
#define STATUS_FAILURE -1
#define STATUS_ERROR -2
#define STATUS_NOT_SUPPORTED -3
#define STATUS_BUFFER_TOO_SHORT -4
#define SLIC_MAX_CARDS 32
#define SLIC_MAX_PORTS 4 /* Max # of ports per card */
#if SLIC_DUMP_ENABLED
/*
Dump buffer size
This cannot be bigger than the max DMA size the card supports,
given the current code structure in the host and ucode.
Mojave supports 16K, Oasis supports 16K-1, so
just set this at 15K, shouldnt make that much of a diff.
*/
#define DUMP_BUF_SIZE 0x3C00
#endif
typedef struct _mcast_address_t {
uchar address[6];
struct _mcast_address_t *next;
} mcast_address_t, *p_mcast_address_t;
#define CARD_DOWN 0x00000000
#define CARD_UP 0x00000001
#define CARD_FAIL 0x00000002
#define CARD_DIAG 0x00000003
#define CARD_SLEEP 0x00000004
#define ADAPT_DOWN 0x00
#define ADAPT_UP 0x01
#define ADAPT_FAIL 0x02
#define ADAPT_RESET 0x03
#define ADAPT_SLEEP 0x04
#define ADAPT_FLAGS_BOOTTIME 0x0001
#define ADAPT_FLAGS_IS64BIT 0x0002
#define ADAPT_FLAGS_PENDINGLINKDOWN 0x0004
#define ADAPT_FLAGS_FIBERMEDIA 0x0008
#define ADAPT_FLAGS_LOCKS_ALLOCED 0x0010
#define ADAPT_FLAGS_INT_REGISTERED 0x0020
#define ADAPT_FLAGS_LOAD_TIMER_SET 0x0040
#define ADAPT_FLAGS_STATS_TIMER_SET 0x0080
#define ADAPT_FLAGS_RESET_TIMER_SET 0x0100
#define LINK_DOWN 0x00
#define LINK_CONFIG 0x01
#define LINK_UP 0x02
#define LINK_10MB 0x00
#define LINK_100MB 0x01
#define LINK_AUTOSPEED 0x02
#define LINK_1000MB 0x03
#define LINK_10000MB 0x04
#define LINK_HALFD 0x00
#define LINK_FULLD 0x01
#define LINK_AUTOD 0x02
#define MAC_DIRECTED 0x00000001
#define MAC_BCAST 0x00000002
#define MAC_MCAST 0x00000004
#define MAC_PROMISC 0x00000008
#define MAC_LOOPBACK 0x00000010
#define MAC_ALLMCAST 0x00000020
#define SLIC_DUPLEX(x) ((x == LINK_FULLD) ? "FDX" : "HDX")
#define SLIC_SPEED(x) ((x == LINK_100MB) ? "100Mb" : ((x == LINK_1000MB) ?\
"1000Mb" : " 10Mb"))
#define SLIC_LINKSTATE(x) ((x == LINK_DOWN) ? "Down" : "Up ")
#define SLIC_ADAPTER_STATE(x) ((x == ADAPT_UP) ? "UP" : "Down")
#define SLIC_CARD_STATE(x) ((x == CARD_UP) ? "UP" : "Down")
typedef struct _slic_iface_stats {
/*
* Stats
*/
ulong64 xmt_bytes;
ulong64 xmt_ucast;
ulong64 xmt_mcast;
ulong64 xmt_bcast;
ulong64 xmt_errors;
ulong64 xmt_discards;
ulong64 xmit_collisions;
ulong64 xmit_excess_xmit_collisions;
ulong64 rcv_bytes;
ulong64 rcv_ucast;
ulong64 rcv_mcast;
ulong64 rcv_bcast;
ulong64 rcv_errors;
ulong64 rcv_discards;
} slic_iface_stats_t, *p_slic_iface_stats_t;
typedef struct _slic_tcp_stats {
ulong64 xmit_tcp_segs;
ulong64 xmit_tcp_bytes;
ulong64 rcv_tcp_segs;
ulong64 rcv_tcp_bytes;
} slic_tcp_stats_t, *p_slic_tcp_stats_t;
typedef struct _slicnet_stats {
slic_tcp_stats_t tcp;
slic_iface_stats_t iface;
} slicnet_stats_t, *p_slicnet_stats_t;
#define SLIC_LOADTIMER_PERIOD 1
#define SLIC_INTAGG_DEFAULT 200
#define SLIC_LOAD_0 0
#define SLIC_INTAGG_0 0
#define SLIC_LOAD_1 8000
#define SLIC_LOAD_2 10000
#define SLIC_LOAD_3 12000
#define SLIC_LOAD_4 14000
#define SLIC_LOAD_5 16000
#define SLIC_INTAGG_1 50
#define SLIC_INTAGG_2 100
#define SLIC_INTAGG_3 150
#define SLIC_INTAGG_4 200
#define SLIC_INTAGG_5 250
#define SLIC_LOAD_1GB 3000
#define SLIC_LOAD_2GB 6000
#define SLIC_LOAD_3GB 12000
#define SLIC_LOAD_4GB 24000
#define SLIC_LOAD_5GB 48000
#define SLIC_INTAGG_1GB 50
#define SLIC_INTAGG_2GB 75
#define SLIC_INTAGG_3GB 100
#define SLIC_INTAGG_4GB 100
#define SLIC_INTAGG_5GB 100
typedef struct _ether_header {
uchar ether_dhost[6];
uchar ether_shost[6];
ushort ether_type;
} ether_header, *p_ether_header;
typedef struct _sliccard_t {
uint busnumber;
uint slotnumber;
uint state;
uint cardnum;
uint card_size;
uint adapters_activated;
uint adapters_allocated;
uint adapters_sleeping;
uint gennumber;
ulong32 events;
ulong32 loadlevel_current;
ulong32 load;
uint reset_in_progress;
ulong32 pingstatus;
ulong32 bad_pingstatus;
struct timer_list loadtimer;
ulong32 loadtimerset;
uint config_set;
slic_config_t config;
struct dentry *debugfs_dir;
struct dentry *debugfs_cardinfo;
struct _adapter_t *master;
struct _adapter_t *adapter[SLIC_MAX_PORTS];
struct _sliccard_t *next;
ulong32 error_interrupts;
ulong32 error_rmiss_interrupts;
ulong32 rcv_interrupts;
ulong32 xmit_interrupts;
ulong32 num_isrs;
ulong32 false_interrupts;
ulong32 max_isr_rcvs;
ulong32 max_isr_xmits;
ulong32 rcv_interrupt_yields;
ulong32 tx_packets;
#if SLIC_DUMP_ENABLED
ulong32 dumpstatus; /* Result of dump UPR */
pvoid cmdbuffer;
ulong cmdbuffer_phys;
ulong32 cmdbuffer_physl;
ulong32 cmdbuffer_physh;
ulong32 dump_count;
struct task_struct *dump_task_id;
ulong32 dump_wait_count;
uint dumpthread_running; /* has a dump thread been init'd */
uint dump_requested; /* 0 no, 1 = reqstd 2=curr 3=done */
ulong32 dumptime_start;
ulong32 dumptime_complete;
ulong32 dumptime_delta;
pvoid dumpbuffer;
ulong dumpbuffer_phys;
ulong32 dumpbuffer_physl;
ulong32 dumpbuffer_physh;
wait_queue_head_t dump_wq;
struct file *dumphandle;
mm_segment_t dumpfile_fs;
#endif
ulong32 debug_ix;
ushort reg_type[32];
ushort reg_offset[32];
ulong32 reg_value[32];
ulong32 reg_valueh[32];
} sliccard_t, *p_sliccard_t;
#define NUM_CFG_SPACES 2
#define NUM_CFG_REGS 64
#define NUM_CFG_REG_ULONGS (NUM_CFG_REGS / sizeof(ulong32))
typedef struct _physcard_t {
struct _adapter_t *adapter[SLIC_MAX_PORTS];
struct _physcard_t *next;
uint adapters_allocd;
/* the following is not currently needed
ulong32 bridge_busnum;
ulong32 bridge_cfg[NUM_CFG_SPACES][NUM_CFG_REG_ULONGS];
*/
} physcard_t, *p_physcard_t;
typedef struct _base_driver {
struct slic_spinlock driver_lock;
ulong32 num_slic_cards;
ulong32 num_slic_ports;
ulong32 num_slic_ports_active;
ulong32 dynamic_intagg;
p_sliccard_t slic_card;
p_physcard_t phys_card;
uint cardnuminuse[SLIC_MAX_CARDS];
} base_driver_t, *p_base_driver_t;
extern base_driver_t slic_global;
typedef struct _slic_shmem_t {
volatile ulong32 isr;
volatile ulong32 linkstatus;
volatile slic_stats_t inicstats;
} slic_shmem_t, *p_slic_shmem_t;
typedef struct _slic_reg_params_t {
ulong32 linkspeed;
ulong32 linkduplex;
ulong32 fail_on_bad_eeprom;
} slic_reg_params_t, *p_reg_params_t;
typedef struct _slic_upr_t {
uint adapter;
ulong32 upr_request;
ulong32 upr_data;
ulong32 upr_data_h;
ulong32 upr_buffer;
ulong32 upr_buffer_h;
struct _slic_upr_t *next;
} slic_upr_t, *p_slic_upr_t;
typedef struct _slic_ifevents_ti {
uint oflow802;
uint uflow802;
uint Tprtoflow;
uint rcvearly;
uint Bufov;
uint Carre;
uint Longe;
uint Invp;
uint Crc;
uint Drbl;
uint Code;
uint IpHlen;
uint IpLen;
uint IpCsum;
uint TpCsum;
uint TpHlen;
} slic_ifevents_t;
typedef struct _adapter_t {
pvoid ifp;
p_sliccard_t card;
uint port;
p_physcard_t physcard;
uint physport;
uint cardindex;
uint card_size;
uint chipid;
struct net_device *netdev;
struct net_device *next_netdevice;
struct slic_spinlock adapter_lock;
struct slic_spinlock reset_lock;
struct pci_dev *pcidev;
uint busnumber;
uint slotnumber;
uint functionnumber;
ushort vendid;
ushort devid;
ushort subsysid;
ulong32 irq;
void __iomem *memorybase;
ulong32 memorylength;
ulong32 drambase;
ulong32 dramlength;
uint queues_initialized;
uint allocated;
uint activated;
ulong32 intrregistered;
uint isp_initialized;
uint gennumber;
ulong32 curaddrupper;
p_slic_shmem_t pshmem;
dma_addr_t phys_shmem;
ulong32 isrcopy;
p_slic_regs_t slic_regs;
uchar state;
uchar linkstate;
uchar linkspeed;
uchar linkduplex;
uint flags;
uchar macaddr[6];
uchar currmacaddr[6];
ulong32 macopts;
ushort devflags_prev;
ulong64 mcastmask;
p_mcast_address_t mcastaddrs;
p_slic_upr_t upr_list;
uint upr_busy;
struct timer_list pingtimer;
ulong32 pingtimerset;
struct timer_list statstimer;
ulong32 statstimerset;
struct timer_list loadtimer;
ulong32 loadtimerset;
struct dentry *debugfs_entry;
struct slic_spinlock upr_lock;
struct slic_spinlock bit64reglock;
slic_rspqueue_t rspqueue;
slic_rcvqueue_t rcvqueue;
slic_cmdqueue_t cmdq_free;
slic_cmdqueue_t cmdq_done;
slic_cmdqueue_t cmdq_all;
slic_cmdqmem_t cmdqmem;
/*
* SLIC Handles
*/
slic_handle_t slic_handles[SLIC_CMDQ_MAXCMDS+1]; /* Object handles*/
pslic_handle_t pfree_slic_handles; /* Free object handles*/
struct slic_spinlock handle_lock; /* Object handle list lock*/
ushort slic_handle_ix;
ulong32 xmitq_full;
ulong32 all_reg_writes;
ulong32 icr_reg_writes;
ulong32 isr_reg_writes;
ulong32 error_interrupts;
ulong32 error_rmiss_interrupts;
ulong32 rx_errors;
ulong32 rcv_drops;
ulong32 rcv_interrupts;
ulong32 xmit_interrupts;
ulong32 linkevent_interrupts;
ulong32 upr_interrupts;
ulong32 num_isrs;
ulong32 false_interrupts;
ulong32 tx_packets;
ulong32 xmit_completes;
ulong32 tx_drops;
ulong32 rcv_broadcasts;
ulong32 rcv_multicasts;
ulong32 rcv_unicasts;
ulong32 max_isr_rcvs;
ulong32 max_isr_xmits;
ulong32 rcv_interrupt_yields;
ulong32 intagg_period;
p_inicpm_state_t inicpm_info;
pvoid pinicpm_info;
slic_reg_params_t reg_params;
slic_ifevents_t if_events;
slic_stats_t inicstats_prev;
slicnet_stats_t slic_stats;
struct net_device_stats stats;
} adapter_t, *p_adapter_t;
#if SLIC_DUMP_ENABLED
#define SLIC_DUMP_REQUESTED 1
#define SLIC_DUMP_IN_PROGRESS 2
#define SLIC_DUMP_DONE 3
/****************************************************************************
*
* Microcode crash information structure. This
* structure is written out to the card's SRAM when the microcode panic's.
*
****************************************************************************/
typedef struct _slic_crash_info {
ushort cpu_id;
ushort crash_pc;
} slic_crash_info, *p_slic_crash_info;
#define CRASH_INFO_OFFSET 0x155C
#endif
#define UPDATE_STATS(largestat, newstat, oldstat) \
{ \
if ((newstat) < (oldstat)) \
(largestat) += ((newstat) + (0xFFFFFFFF - oldstat + 1)); \
else \
(largestat) += ((newstat) - (oldstat)); \
}
#define UPDATE_STATS_GB(largestat, newstat, oldstat) \
{ \
(largestat) += ((newstat) - (oldstat)); \
}
#define ETHER_EQ_ADDR(_AddrA, _AddrB, _Result) \
{ \
_Result = TRUE; \
if (*(pulong32)(_AddrA) != *(pulong32)(_AddrB)) \
_Result = FALSE; \
if (*(pushort)(&((_AddrA)[4])) != *(pushort)(&((_AddrB)[4]))) \
_Result = FALSE; \
}
#if defined(CONFIG_X86_64) || defined(CONFIG_IA64)
#define SLIC_GET_ADDR_LOW(_addr) (ulong32)((ulong64)(_addr) & \
0x00000000FFFFFFFF)
#define SLIC_GET_ADDR_HIGH(_addr) (ulong32)(((ulong64)(_addr) >> 32) & \
0x00000000FFFFFFFF)
#else
#define SLIC_GET_ADDR_LOW(_addr) (ulong32)_addr
#define SLIC_GET_ADDR_HIGH(_addr) (ulong32)0
#endif
#define FLUSH TRUE
#define DONT_FLUSH FALSE
#define SIOCSLICDUMPCARD (SIOCDEVPRIVATE+9)
#define SIOCSLICSETINTAGG (SIOCDEVPRIVATE+10)
#define SIOCSLICTRACEDUMP (SIOCDEVPRIVATE+11)
#endif /* __SLIC_DRIVER_H__ */

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drivers/staging/slicoss/slic_os.h Normal file
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/**************************************************************************
*
* Copyright (c)2000-2002 Alacritech, Inc. All rights reserved.
*
* $Id: slic_os.h,v 1.2 2006/03/27 15:10:15 mook Exp $
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* The views and conclusions contained in the software and documentation
* are those of the authors and should not be interpreted as representing
* official policies, either expressed or implied, of Alacritech, Inc.
*
**************************************************************************/
/*
* FILENAME: slic_os.h
*
* These are the Linux-specific definitions required for the SLICOSS
* driver, which should allow for greater portability to other OSes.
*/
#ifndef _SLIC_OS_SPECIFIC_H_
#define _SLIC_OS_SPECIFIC_H_
typedef unsigned char uchar;
typedef u64 ulong64;
typedef char *pchar;
typedef unsigned char *puchar;
typedef u16 *pushort;
typedef u32 ulong32;
typedef u32 *pulong32;
typedef int *plong32;
typedef unsigned int *puint;
typedef void *pvoid;
typedef unsigned long *pulong;
typedef unsigned int boolean;
typedef unsigned int wchar;
typedef unsigned int *pwchar;
typedef unsigned char UCHAR;
typedef u32 ULONG;
typedef s32 LONG;
#define FALSE (0)
#define TRUE (1)
#define SLIC_INIT_SPINLOCK(x) \
{ \
spin_lock_init(&((x).lock)); \
}
#define SLIC_ACQUIRE_SPINLOCK(x) \
{ \
spin_lock(&((x).lock)); \
}
#define SLIC_RELEASE_SPINLOCK(x) \
{ \
spin_unlock(&((x).lock)); \
}
#define SLIC_ACQUIRE_IRQ_SPINLOCK(x) \
{ \
spin_lock_irqsave(&((x).lock), (x).flags); \
}
#define SLIC_RELEASE_IRQ_SPINLOCK(x) \
{ \
spin_unlock_irqrestore(&((x).lock), (x).flags); \
}
#define ATK_DEBUG 1
#if ATK_DEBUG
#define SLIC_TIMESTAMP(value) { \
struct timeval timev; \
do_gettimeofday(&timev); \
value = timev.tv_sec*1000000 + timev.tv_usec; \
}
#else
#define SLIC_TIMESTAMP(value)
#endif
#define SLIC_ALLOCATE_MEM(len, flag) kmalloc(len, flag)
#define SLIC_DEALLOCATE_MEM(mem) kfree(mem)
#define SLIC_DEALLOCATE_IRQ_MEM(mem) free(mem)
#define SLIC_ALLOCATE_PAGE(x) (pulong32)get_free_page(GFP_KERNEL)
#define SLIC_DEALLOCATE_PAGE(addr) free_page((ulong32)addr)
#define SLIC_ALLOCATE_PCIMEM(a, sz, physp) \
pci_alloc_consistent((a)->pcidev, (sz), &(physp))
#define SLIC_DEALLOCATE_PCIMEM(a, sz, vp, pp) \
pci_free_consistent((a)->pcidev, (sz), (vp), (pp))
#define SLIC_GET_PHYSICAL_ADDRESS(addr) virt_to_bus((addr))
#define SLIC_GET_PHYSICAL_ADDRESS_HIGH(addr) 0
#define SLIC_GET_DMA_ADDRESS_WRITE(a, ptr, sz) \
pci_map_single((a)->pcidev, (ptr), (sz), PCI_DMA_TODEVICE)
#define SLIC_GET_DMA_ADDRESS_READ(a, ptr, sz) \
pci_map_single((a)->pcidev, (ptr), (sz), PCI_DMA_FROMDEVICE)
#define SLIC_UNGET_DMA_ADDRESS_WRITE(a, pa, sz) \
pci_unmap_single((a)->pcidev, (pa), (sz), PCI_DMA_TODEVICE)
#define SLIC_UNGET_DMA_ADDRESS_READ(a, pa, sz) \
pci_unmap_single((a)->pcidev, (pa), (sz), PCI_DMA_FROMDEVICE)
#define SLIC_ZERO_MEMORY(p, sz) memset((p), 0, (sz))
#define SLIC_EQUAL_MEMORY(src1, src2, len) (!memcmp(src1, src2, len))
#define SLIC_MOVE_MEMORY(dst, src, len) memcpy((dst), (src), (len))
#define SLIC_SECS_TO_JIFFS(x) ((x) * HZ)
#define SLIC_MS_TO_JIFFIES(x) (SLIC_SECS_TO_JIFFS((x)) / 1000)
#ifdef DEBUG_REGISTER_TRACE
#define WRITE_REG(reg, value, flush) \
{ \
adapter->card->reg_type[adapter->card->debug_ix] = 0; \
adapter->card->reg_offset[adapter->card->debug_ix] = \
((puchar)(&reg)) - ((puchar)adapter->slic_regs); \
adapter->card->reg_value[adapter->card->debug_ix++] = value; \
if (adapter->card->debug_ix == 32) \
adapter->card->debug_ix = 0; \
slic_reg32_write((&reg), (value), (flush)); \
}
#define WRITE_REG64(a, reg, value, regh, valh, flush) \
{ \
adapter->card->reg_type[adapter->card->debug_ix] = 1; \
adapter->card->reg_offset[adapter->card->debug_ix] = \
((puchar)(&reg)) - ((puchar)adapter->slic_regs); \
adapter->card->reg_value[adapter->card->debug_ix] = value; \
adapter->card->reg_valueh[adapter->card->debug_ix++] = valh; \
if (adapter->card->debug_ix == 32) \
adapter->card->debug_ix = 0; \
slic_reg64_write((a), (&reg), (value), (&regh), (valh), \
(flush));\
}
#else
#define WRITE_REG(reg, value, flush) \
slic_reg32_write((&reg), (value), (flush))
#define WRITE_REG64(a, reg, value, regh, valh, flush) \
slic_reg64_write((a), (&reg), (value), (&regh), (valh), (flush))
#endif
#define READ_REG(reg, flush) slic_reg32_read((&reg), (flush))
#define READ_REGP16(reg, flush) slic_reg16_read((&reg), (flush))
#endif /* _SLIC_OS_SPECIFIC_H_ */

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/**************************************************************************
*
* Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved.
*
* $Id: slicbuild.h,v 1.2 2006/03/27 15:10:10 mook Exp $
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* The views and conclusions contained in the software and documentation
* are those of the authors and should not be interpreted as representing
* official policies, either expressed or implied, of Alacritech, Inc.
*
**************************************************************************/
/*
* FILENAME: slicbuild.h
*
* The following contains the compiler directive switches used for
* different SLIC build options. They can all be set in the Makefile
* but the defaults are defined here.
*/
#ifndef _SLIC_BUILD_H_
#define _SLIC_BUILD_H_
#ifndef SLIC_PRODUCTION_BUILD
#define SLIC_PRODUCTION_BUILD 1
#endif
#ifndef SLIC_FAILURE_RESET
#define SLIC_FAILURE_RESET 1
#endif
#define DBG 1
#ifndef SLIC_ASSERT_ENABLED
#define SLIC_ASSERT_ENABLED 1
#endif
#ifndef SLIC_MCAST_ENABLED
#define SLIC_MCAST_ENABLED 1
#endif
#ifndef SLIC_GET_STATS_ENABLED
#define SLIC_GET_STATS_ENABLED 1
#endif
#ifndef SLIC_GET_STATS_TIMER_ENABLED
#define SLIC_GET_STATS_TIMER_ENABLED 0
#endif
#ifndef SLIC_PING_TIMER_ENABLED
#define SLIC_PING_TIMER_ENABLED 1
#endif
#ifndef SLIC_IOCTL_SUPPORT_ENABLED
#define SLIC_IOCTL_SUPPORT_ENABLED 1
#endif
#ifndef ATK_DEBUG
#define ATK_DEBUG 1
#endif
#ifndef SLIC_POWER_MANAGEMENT_ENABLED
#define SLIC_POWER_MANAGEMENT_ENABLED 0
#endif
#ifndef SLIC_INTERRUPT_PROCESS_LIMIT
#define SLIC_INTERRUPT_PROCESS_LIMIT 1
#endif
#ifndef LINUX_FREES_ADAPTER_RESOURCES
#define LINUX_FREES_ADAPTER_RESOURCES 1
#endif
#ifndef SLIC_OFFLOAD_IP_CHECKSUM
#define SLIC_OFFLOAD_IP_CHECKSUM 1
#endif
#ifndef SLIC_POWER_MANAGEMENT_ENABLED
#define SLIC_POWER_MANAGEMENT_ENABLED 0
#endif
#ifndef STATS_TIMER_INTERVAL
#define STATS_TIMER_INTERVAL 2
#endif
#ifndef PING_TIMER_INTERVAL
#define PING_TIMER_INTERVAL 1
#endif
#endif /* _SLIC_BUILD_H_ */

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/**************************************************************************
*
* Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved.
*
* $Id: slicdbg.h,v 1.2 2006/03/27 15:10:04 mook Exp $
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* The views and conclusions contained in the software and documentation
* are those of the authors and should not be interpreted as representing
* official policies, either expressed or implied, of Alacritech, Inc.
*
**************************************************************************/
/*
* FILENAME: slicdbg.h
*
* All debug and assertion-based definitions and macros are included
* in this file for the SLICOSS driver.
*/
#ifndef _SLIC_DEBUG_H_
#define _SLIC_DEBUG_H_
#ifdef SLIC_DEFAULT_LOG_LEVEL
#else
#define SLICLEVEL KERN_DEBUG
#endif
#define SLIC_DISPLAY printk
#define DBG_ERROR(n, args...) SLIC_DISPLAY(KERN_EMERG n, ##args)
#define SLIC_DEBUG_MESSAGE 1
#if SLIC_DEBUG_MESSAGE
/*#define DBG_MSG(n, args...) SLIC_DISPLAY(SLICLEVEL n, ##args)*/
#define DBG_MSG(n, args...)
#else
#define DBG_MSG(n, args...)
#endif
#ifdef ASSERT
#undef ASSERT
#endif
#if SLIC_ASSERT_ENABLED
#ifdef CONFIG_X86_64
#define VALID_ADDRESS(p) (1)
#else
#define VALID_ADDRESS(p) (((ulong32)(p) & 0x80000000) || ((ulong32)(p) == 0))
#endif
#ifndef ASSERT
#define ASSERT(a) \
{ \
if (!(a)) { \
DBG_ERROR("ASSERT() Failure: file %s, function %s line %d\n",\
__FILE__, __func__, __LINE__); \
slic_assert_fail(); \
} \
}
#endif
#ifndef ASSERTMSG
#define ASSERTMSG(a,msg) \
{ \
if (!(a)) { \
DBG_ERROR("ASSERT() Failure: file %s, function %s"\
"line %d: %s\n",\
__FILE__, __func__, __LINE__, (msg)); \
slic_assert_fail(); \
} \
}
#endif
#else
#ifndef ASSERT
#define ASSERT(a)
#endif
#ifndef ASSERTMSG
#define ASSERTMSG(a, msg)
#endif
#endif /* SLIC_ASSERT_ENABLED */
#endif /* _SLIC_DEBUG_H_ */

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/*
* $Id: slicdump.h,v 1.2 2006/03/27 15:09:57 mook Exp $
*
* Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* NO LICENSE TO ANY ALACRITECH PATENT CLAIM IS GRANTED BY ANY COPYRIGHT
* LICENSE TO THIS OR OTHER SOFTWARE. THIS SOFTWARE MAY BE COVERED BY
* ALACRITECH PATENTS INCLUDING BUT NOT LIMITED TO U.S. PATENT NOS. 6,226,680,
* 6,247,060, 6,334,153, 6,389,479, 6,393,487, 6,427,171, 6,427,173
* and 6,434,620.
* THIS SOFTWARE IS NOT SUBJECT TO THE GNU GENERAL PUBLIC LICENSE (GPL).
*
* The views and conclusions contained in the software and
* documentation are those of the authors and should not be
* interpreted as representing official policies, either
* expressed or implied, of Alacritech, Inc.
*/
#ifndef _SLIC_DUMP_H_
#define _SLIC_DUMP_H_
#define DEBUG_SUCCESS 0
/***********************************************************************
*
* Utility processor register locations
*
**********************************************************************/
#define UTILITY_RESET 0x0
#define UTILITY_ISP_ADDR 0x4 /* Interrupt status Pointer */
#define UTILITY_ISR_ADDR 0x8 /* Interrupt status Register */
#define UTILITY_ICR_ADDR 0xc /* Interrupt Control Register */
#define UTILITY_CPR_ADDR 0x10 /* Command Pointer Register */
#define UTILITY_DPR_ADDR 0x14 /* Data Pointer Register */
#define UTILITY_DMP_TRQ 0x18 /* Dump queue onto ALU for analyser */
#define UTILITY_UPP_ADDR 0x1c /* Bits 63-32 of cmd/data pointer */
/***********************************************************************
*
* INIC status register bits
*
***********************************************************************/
#define SLIC_ISR_CC 0x10000000 /* Command complete - synchronous */
#define SLIC_ISR_ERR 0x01000000 /* Command Error - synchronous */
#define SLIC_ISR_CMD_MASK 0x11000000 /* Command status mask */
#define SLIC_ISR_TPH 0x00080000 /* Transmit processor halted - async */
#define SLIC_ISR_RPH 0x00040000 /* Receive processor halted - async */
/***********************************************************************
*
* INIC Control register values
*
***********************************************************************/
#define SLIC_ICR_OFF 0 /* Interrupts disabled */
#define SLIC_ICR_ON 1 /* Interrupts enabled */
#define SLIC_ICR_MASK 2 /* Interrupts masked */
#define WRITE_DREG(reg, value, flush) \
{ \
writel((value), (reg)); \
if ((flush)) { \
mb(); \
} \
}
/************************************************************************
*
* Command Format
*
* Each command contains a command byte which is defined as follows:
*
* bits: 7-3 2 1-0
* ----------------------------------------------
* command Alt. Proc Processor
*
************************************************************************/
/*
* Macro to create the command byte given the command, Alt. Proc, and
* Processor values. Note that the macro assumes that the values are
* preshifted. That is, the values for alt. proc are 0 for transmit and
* 4 for receive.
*/
#define COMMAND_BYTE(command, alt_proc, proc) ((command) | (alt_proc) | (proc))
/*
* Command values
*/
#define CMD_HALT 0x0 /* Send a halt to the INIC */
#define CMD_RUN 0x8 /* Start the halted INIC */
#define CMD_STEP 0x10 /* Single step the inic */
#define CMD_BREAK 0x18 /* Set a breakpoint - 8 byte command */
#define CMD_RESET_BREAK 0x20 /* Reset a breakpoint - 8 byte cmd */
#define CMD_DUMP 0x28 /* Dump INIC memory - 8 byte command */
#define CMD_LOAD 0x30 /* Load INIC memory - 8 byte command */
#define CMD_MAP 0x38 /* Map out a ROM instruction - 8 BC */
#define CMD_CAM_OPS 0x38 /* perform ops on specific CAM */
#define CMD_XMT 0x40 /* Transmit frame */
#define CMD_RCV 0x48 /* Receive frame */
/*
* Alt. Proc values
*
* When the proc value is set to the utility processor, the Alt. Proc
* specifies which processor handles the debugging.
*/
#define ALT_PROC_TRANSMIT 0x0
#define ALT_PROC_RECEIVE 0x4
/*
* Proc values
*/
#define PROC_INVALID 0x0
#define PROC_NONE 0x0 /* Gigabit use */
#define PROC_TRANSMIT 0x1
#define PROC_RECEIVE 0x2
#define PROC_UTILITY 0x3
/******************************************************************
*
* 8 byte command structure definitions
*
******************************************************************/
/*
* Break and Reset Break command structure
*/
typedef struct _BREAK {
uchar command; /* Command word defined above */
uchar resvd;
ushort count; /* Number of executions before break */
ulong32 addr; /* Address of break point */
} BREAK, *PBREAK;
/*
* Dump and Load command structure
*/
typedef struct _dump_cmd {
uchar cmd; /* Command word defined above */
uchar desc; /* Descriptor values - defined below */
ushort count; /* number of 4 byte words to be transferred */
ulong32 addr; /* start address of dump or load */
} dump_cmd_t, *pdump_cmd_t;
/*
* Receive or Transmit a frame.
*/
typedef struct _RCV_OR_XMT_FRAME {
uchar command; /* Command word defined above */
uchar MacId; /* Mac ID of interface - transmit only */
ushort count; /* Length of frame in bytes */
ulong32 pad; /* not used */
} RCV_OR_XMT_FRAME, *PRCV_OR_XMT_FRAME;
/*
* Values of desc field in DUMP_OR_LOAD structure
*/
#define DESC_RFILE 0x0 /* Register file */
#define DESC_SRAM 0x1 /* SRAM */
#define DESC_DRAM 0x2 /* DRAM */
#define DESC_QUEUE 0x3 /* queues */
#define DESC_REG 0x4 /* General registers (pc, status, etc) */
#define DESC_SENSE 0x5 /* Sense register */
/* Descriptor field definitions for CMD_DUMP_CAM */
#define DUMP_CAM_A 0
#define DUMP_CAM_B 1 /* unused at present */
#define DUMP_CAM_C 2
#define DUMP_CAM_D 3
#define SEARCH_CAM_A 4
#define SEARCH_CAM_C 5
/*
* Map command to replace a command in ROM with a command in WCS
*/
typedef struct _MAP {
uchar command; /* Command word defined above */
uchar not_used[3];
ushort map_to; /* Instruction address in WCS */
ushort map_out; /* Instruction address in ROM */
} MAP, *PMAP;
/*
* Misc definitions
*/
#define SLIC_MAX_QUEUE 32 /* Total # of queues on the INIC (0-31)*/
#define SLIC_4MAX_REG 512 /* Total # of 4-port file-registers */
#define SLIC_1MAX_REG 384 /* Total # of file-registers */
#define SLIC_GBMAX_REG 1024 /* Total # of Gbit file-registers */
#define SLIC_NUM_REG 32 /* non-file-registers = NUM_REG in tm-simba.h */
#define SLIC_GB_CAMA_SZE 32
#define SLIC_GB_CAMB_SZE 16
#define SLIC_GB_CAMAB_SZE 32
#define SLIC_GB_CAMC_SZE 16
#define SLIC_GB_CAMD_SZE 16
#define SLIC_GB_CAMCD_SZE 32
/*
* Coredump header structure
*/
typedef struct _CORE_Q {
ulong32 queueOff; /* Offset of queue */
ulong32 queuesize; /* size of queue */
} CORE_Q;
#define DRIVER_NAME_SIZE 32
typedef struct _sliccore_hdr_t {
uchar driver_version[DRIVER_NAME_SIZE]; /* Driver version string */
ulong32 RcvRegOff; /* Offset of receive registers */
ulong32 RcvRegsize; /* size of receive registers */
ulong32 XmtRegOff; /* Offset of transmit registers */
ulong32 XmtRegsize; /* size of transmit registers */
ulong32 FileRegOff; /* Offset of register file */
ulong32 FileRegsize; /* size of register file */
ulong32 SramOff; /* Offset of Sram */
ulong32 Sramsize; /* size of Sram */
ulong32 DramOff; /* Offset of Dram */
ulong32 Dramsize; /* size of Dram */
CORE_Q queues[SLIC_MAX_QUEUE]; /* size and offsets of queues */
ulong32 CamAMOff; /* Offset of CAM A contents */
ulong32 CamASize; /* Size of Cam A */
ulong32 CamBMOff; /* Offset of CAM B contents */
ulong32 CamBSize; /* Size of Cam B */
ulong32 CamCMOff; /* Offset of CAM C contents */
ulong32 CamCSize; /* Size of Cam C */
ulong32 CamDMOff; /* Offset of CAM D contents */
ulong32 CamDSize; /* Size of Cam D */
} sliccore_hdr_t, *p_sliccore_hdr_t;
/*
* definitions needed for our kernel-mode gdb stub.
*/
/***********************************************************************
*
* Definitions & Typedefs
*
**********************************************************************/
#define BUFMAX 0x20000 /* 128k - size of input/output buffer */
#define BUFMAXP2 5 /* 2**5 (32) 4K pages */
#define IOCTL_SIMBA_BREAK _IOW('s', 0, unsigned long)
/* #define IOCTL_SIMBA_INIT _IOW('s', 1, unsigned long) */
#define IOCTL_SIMBA_KILL_TGT_PROC _IOW('s', 2, unsigned long)
/***********************************************************************
*
* Global variables
*
***********************************************************************/
#define THREADRECEIVE 1 /* bit 0 of StoppedThreads */
#define THREADTRANSMIT 2 /* bit 1 of StoppedThreads */
#define THREADBOTH 3 /* bit 0 and 1.. */
#endif /* _SLIC_DUMP_H */

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/**************************************************************************
*
* Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved.
*
* $Id: slichw.h,v 1.3 2008/03/17 19:27:26 chris Exp $
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* The views and conclusions contained in the software and documentation
* are those of the authors and should not be interpreted as representing
* official policies, either expressed or implied, of Alacritech, Inc.
*
**************************************************************************/
/*
* FILENAME: slichw.h
*
* This header file contains definitions that are common to our hardware.
*/
#ifndef __SLICHW_H__
#define __SLICHW_H__
#define PCI_VENDOR_ID_ALACRITECH 0x139A
#define SLIC_1GB_DEVICE_ID 0x0005
#define SLIC_2GB_DEVICE_ID 0x0007 /*Oasis Device ID */
#define SLIC_1GB_CICADA_SUBSYS_ID 0x0008
#define SLIC_NBR_MACS 4
#define SLIC_RCVBUF_SIZE 2048
#define SLIC_RCVBUF_HEADSIZE 34
#define SLIC_RCVBUF_TAILSIZE 0
#define SLIC_RCVBUF_DATASIZE (SLIC_RCVBUF_SIZE - (SLIC_RCVBUF_HEADSIZE +\
SLIC_RCVBUF_TAILSIZE))
#define VGBSTAT_XPERR 0x40000000
#define VGBSTAT_XERRSHFT 25
#define VGBSTAT_XCSERR 0x23
#define VGBSTAT_XUFLOW 0x22
#define VGBSTAT_XHLEN 0x20
#define VGBSTAT_NETERR 0x01000000
#define VGBSTAT_NERRSHFT 16
#define VGBSTAT_NERRMSK 0x1ff
#define VGBSTAT_NCSERR 0x103
#define VGBSTAT_NUFLOW 0x102
#define VGBSTAT_NHLEN 0x100
#define VGBSTAT_LNKERR 0x00000080
#define VGBSTAT_LERRMSK 0xff
#define VGBSTAT_LDEARLY 0x86
#define VGBSTAT_LBOFLO 0x85
#define VGBSTAT_LCODERR 0x84
#define VGBSTAT_LDBLNBL 0x83
#define VGBSTAT_LCRCERR 0x82
#define VGBSTAT_LOFLO 0x81
#define VGBSTAT_LUFLO 0x80
#define IRHDDR_FLEN_MSK 0x0000ffff
#define IRHDDR_SVALID 0x80000000
#define IRHDDR_ERR 0x10000000
#define VRHSTAT_802OE 0x80000000
#define VRHSTAT_TPOFLO 0x10000000
#define VRHSTATB_802UE 0x80000000
#define VRHSTATB_RCVE 0x40000000
#define VRHSTATB_BUFF 0x20000000
#define VRHSTATB_CARRE 0x08000000
#define VRHSTATB_LONGE 0x02000000
#define VRHSTATB_PREA 0x01000000
#define VRHSTATB_CRC 0x00800000
#define VRHSTATB_DRBL 0x00400000
#define VRHSTATB_CODE 0x00200000
#define VRHSTATB_TPCSUM 0x00100000
#define VRHSTATB_TPHLEN 0x00080000
#define VRHSTATB_IPCSUM 0x00040000
#define VRHSTATB_IPLERR 0x00020000
#define VRHSTATB_IPHERR 0x00010000
#define SLIC_MAX64_BCNT 23
#define SLIC_MAX32_BCNT 26
#define IHCMD_XMT_REQ 0x01
#define IHFLG_IFSHFT 2
#define SLIC_RSPBUF_SIZE 32
#define SLIC_RESET_MAGIC 0xDEAD
#define ICR_INT_OFF 0
#define ICR_INT_ON 1
#define ICR_INT_MASK 2
#define ISR_ERR 0x80000000
#define ISR_RCV 0x40000000
#define ISR_CMD 0x20000000
#define ISR_IO 0x60000000
#define ISR_UPC 0x10000000
#define ISR_LEVENT 0x08000000
#define ISR_RMISS 0x02000000
#define ISR_UPCERR 0x01000000
#define ISR_XDROP 0x00800000
#define ISR_UPCBSY 0x00020000
#define ISR_EVMSK 0xffff0000
#define ISR_PINGMASK 0x00700000
#define ISR_PINGDSMASK 0x00710000
#define ISR_UPCMASK 0x11000000
#define SLIC_WCS_START 0x80000000
#define SLIC_WCS_COMPARE 0x40000000
#define SLIC_RCVWCS_BEGIN 0x40000000
#define SLIC_RCVWCS_FINISH 0x80000000
#define SLIC_PM_MAXPATTERNS 6
#define SLIC_PM_PATTERNSIZE 128
#define SLIC_PMCAPS_WAKEONLAN 0x00000001
#define MIICR_REG_PCR 0x00000000
#define MIICR_REG_4 0x00040000
#define MIICR_REG_9 0x00090000
#define MIICR_REG_16 0x00100000
#define PCR_RESET 0x8000
#define PCR_POWERDOWN 0x0800
#define PCR_SPEED_100 0x2000
#define PCR_SPEED_1000 0x0040
#define PCR_AUTONEG 0x1000
#define PCR_AUTONEG_RST 0x0200
#define PCR_DUPLEX_FULL 0x0100
#define PSR_LINKUP 0x0004
#define PAR_ADV100FD 0x0100
#define PAR_ADV100HD 0x0080
#define PAR_ADV10FD 0x0040
#define PAR_ADV10HD 0x0020
#define PAR_ASYMPAUSE 0x0C00
#define PAR_802_3 0x0001
#define PAR_ADV1000XFD 0x0020
#define PAR_ADV1000XHD 0x0040
#define PAR_ASYMPAUSE_FIBER 0x0180
#define PGC_ADV1000FD 0x0200
#define PGC_ADV1000HD 0x0100
#define SEEQ_LINKFAIL 0x4000
#define SEEQ_SPEED 0x0080
#define SEEQ_DUPLEX 0x0040
#define TDK_DUPLEX 0x0800
#define TDK_SPEED 0x0400
#define MRV_REG16_XOVERON 0x0068
#define MRV_REG16_XOVEROFF 0x0008
#define MRV_SPEED_1000 0x8000
#define MRV_SPEED_100 0x4000
#define MRV_SPEED_10 0x0000
#define MRV_FULLDUPLEX 0x2000
#define MRV_LINKUP 0x0400
#define GIG_LINKUP 0x0001
#define GIG_FULLDUPLEX 0x0002
#define GIG_SPEED_MASK 0x000C
#define GIG_SPEED_1000 0x0008
#define GIG_SPEED_100 0x0004
#define GIG_SPEED_10 0x0000
#define MCR_RESET 0x80000000
#define MCR_CRCEN 0x40000000
#define MCR_FULLD 0x10000000
#define MCR_PAD 0x02000000
#define MCR_RETRYLATE 0x01000000
#define MCR_BOL_SHIFT 21
#define MCR_IPG1_SHIFT 14
#define MCR_IPG2_SHIFT 7
#define MCR_IPG3_SHIFT 0
#define GMCR_RESET 0x80000000
#define GMCR_GBIT 0x20000000
#define GMCR_FULLD 0x10000000
#define GMCR_GAPBB_SHIFT 14
#define GMCR_GAPR1_SHIFT 7
#define GMCR_GAPR2_SHIFT 0
#define GMCR_GAPBB_1000 0x60
#define GMCR_GAPR1_1000 0x2C
#define GMCR_GAPR2_1000 0x40
#define GMCR_GAPBB_100 0x70
#define GMCR_GAPR1_100 0x2C
#define GMCR_GAPR2_100 0x40
#define XCR_RESET 0x80000000
#define XCR_XMTEN 0x40000000
#define XCR_PAUSEEN 0x20000000
#define XCR_LOADRNG 0x10000000
#define RCR_RESET 0x80000000
#define RCR_RCVEN 0x40000000
#define RCR_RCVALL 0x20000000
#define RCR_RCVBAD 0x10000000
#define RCR_CTLEN 0x08000000
#define RCR_ADDRAEN 0x02000000
#define GXCR_RESET 0x80000000
#define GXCR_XMTEN 0x40000000
#define GXCR_PAUSEEN 0x20000000
#define GRCR_RESET 0x80000000
#define GRCR_RCVEN 0x40000000
#define GRCR_RCVALL 0x20000000
#define GRCR_RCVBAD 0x10000000
#define GRCR_CTLEN 0x08000000
#define GRCR_ADDRAEN 0x02000000
#define GRCR_HASHSIZE_SHIFT 17
#define GRCR_HASHSIZE 14
#define SLIC_EEPROM_ID 0xA5A5
#define SLIC_SRAM_SIZE2GB (64 * 1024)
#define SLIC_SRAM_SIZE1GB (32 * 1024)
#define SLIC_HOSTID_DEFAULT 0xFFFF /* uninitialized hostid */
#define SLIC_NBR_MACS 4
#ifndef FALSE
#define FALSE 0
#else
#undef FALSE
#define FALSE 0
#endif
#ifndef TRUE
#define TRUE 1
#else
#undef TRUE
#define TRUE 1
#endif
typedef struct _slic_rcvbuf_t {
uchar pad1[6];
ushort pad2;
ulong32 pad3;
ulong32 pad4;
ulong32 buffer;
ulong32 length;
ulong32 status;
ulong32 pad5;
ushort pad6;
uchar data[SLIC_RCVBUF_DATASIZE];
} slic_rcvbuf_t, *p_slic_rcvbuf_t;
typedef struct _slic_hddr_wds {
union {
struct {
ulong32 frame_status;
ulong32 frame_status_b;
ulong32 time_stamp;
ulong32 checksum;
} hdrs_14port;
struct {
ulong32 frame_status;
ushort ByteCnt;
ushort TpChksum;
ushort CtxHash;
ushort MacHash;
ulong32 BufLnk;
} hdrs_gbit;
} u0;
} slic_hddr_wds_t, *p_slic_hddr_wds;
#define frame_status14 u0.hdrs_14port.frame_status
#define frame_status_b14 u0.hdrs_14port.frame_status_b
#define frame_statusGB u0.hdrs_gbit.frame_status
typedef struct _slic_host64sg_t {
ulong32 paddrl;
ulong32 paddrh;
ulong32 length;
} slic_host64sg_t, *p_slic_host64sg_t;
typedef struct _slic_host64_cmd_t {
ulong32 hosthandle;
ulong32 RSVD;
uchar command;
uchar flags;
union {
ushort rsv1;
ushort rsv2;
} u0;
union {
struct {
ulong32 totlen;
slic_host64sg_t bufs[SLIC_MAX64_BCNT];
} slic_buffers;
} u;
} slic_host64_cmd_t, *p_slic_host64_cmd_t;
typedef struct _slic_rspbuf_t {
ulong32 hosthandle;
ulong32 pad0;
ulong32 pad1;
ulong32 status;
ulong32 pad2[4];
} slic_rspbuf_t, *p_slic_rspbuf_t;
typedef ulong32 SLIC_REG;
typedef struct _slic_regs_t {
ULONG slic_reset; /* Reset Register */
ULONG pad0;
ULONG slic_icr; /* Interrupt Control Register */
ULONG pad2;
#define SLIC_ICR 0x0008
ULONG slic_isp; /* Interrupt status pointer */
ULONG pad1;
#define SLIC_ISP 0x0010
ULONG slic_isr; /* Interrupt status */
ULONG pad3;
#define SLIC_ISR 0x0018
SLIC_REG slic_hbar; /* Header buffer address reg */
ULONG pad4;
/* 31-8 - phy addr of set of contiguous hdr buffers
7-0 - number of buffers passed
Buffers are 256 bytes long on 256-byte boundaries. */
#define SLIC_HBAR 0x0020
#define SLIC_HBAR_CNT_MSK 0x000000FF
SLIC_REG slic_dbar; /* Data buffer handle & address reg */
ULONG pad5;
/* 4 sets of registers; Buffers are 2K bytes long 2 per 4K page. */
#define SLIC_DBAR 0x0028
#define SLIC_DBAR_SIZE 2048
SLIC_REG slic_cbar; /* Xmt Cmd buf addr regs.*/
/* 1 per XMT interface
31-5 - phy addr of host command buffer
4-0 - length of cmd in multiples of 32 bytes
Buffers are 32 bytes up to 512 bytes long */
#define SLIC_CBAR 0x0030
#define SLIC_CBAR_LEN_MSK 0x0000001F
#define SLIC_CBAR_ALIGN 0x00000020
SLIC_REG slic_wcs; /* write control store*/
#define SLIC_WCS 0x0034
#define SLIC_WCS_START 0x80000000 /*Start the SLIC (Jump to WCS)*/
#define SLIC_WCS_COMPARE 0x40000000 /* Compare with value in WCS*/
SLIC_REG slic_rbar; /* Response buffer address reg.*/
ULONG pad7;
/*31-8 - phy addr of set of contiguous response buffers
7-0 - number of buffers passed
Buffers are 32 bytes long on 32-byte boundaries.*/
#define SLIC_RBAR 0x0038
#define SLIC_RBAR_CNT_MSK 0x000000FF
#define SLIC_RBAR_SIZE 32
SLIC_REG slic_stats; /* read statistics (UPR) */
ULONG pad8;
#define SLIC_RSTAT 0x0040
SLIC_REG slic_rlsr; /* read link status */
ULONG pad9;
#define SLIC_LSTAT 0x0048
SLIC_REG slic_wmcfg; /* Write Mac Config */
ULONG pad10;
#define SLIC_WMCFG 0x0050
SLIC_REG slic_wphy; /* Write phy register */
ULONG pad11;
#define SLIC_WPHY 0x0058
SLIC_REG slic_rcbar; /*Rcv Cmd buf addr reg*/
ULONG pad12;
#define SLIC_RCBAR 0x0060
SLIC_REG slic_rconfig; /* Read SLIC Config*/
ULONG pad13;
#define SLIC_RCONFIG 0x0068
SLIC_REG slic_intagg; /* Interrupt aggregation time*/
ULONG pad14;
#define SLIC_INTAGG 0x0070
SLIC_REG slic_wxcfg; /* Write XMIT config reg*/
ULONG pad16;
#define SLIC_WXCFG 0x0078
SLIC_REG slic_wrcfg; /* Write RCV config reg*/
ULONG pad17;
#define SLIC_WRCFG 0x0080
SLIC_REG slic_wraddral; /* Write rcv addr a low*/
ULONG pad18;
#define SLIC_WRADDRAL 0x0088
SLIC_REG slic_wraddrah; /* Write rcv addr a high*/
ULONG pad19;
#define SLIC_WRADDRAH 0x0090
SLIC_REG slic_wraddrbl; /* Write rcv addr b low*/
ULONG pad20;
#define SLIC_WRADDRBL 0x0098
SLIC_REG slic_wraddrbh; /* Write rcv addr b high*/
ULONG pad21;
#define SLIC_WRADDRBH 0x00a0
SLIC_REG slic_mcastlow; /* Low bits of mcast mask*/
ULONG pad22;
#define SLIC_MCASTLOW 0x00a8
SLIC_REG slic_mcasthigh; /* High bits of mcast mask*/
ULONG pad23;
#define SLIC_MCASTHIGH 0x00b0
SLIC_REG slic_ping; /* Ping the card*/
ULONG pad24;
#define SLIC_PING 0x00b8
SLIC_REG slic_dump_cmd; /* Dump command */
ULONG pad25;
#define SLIC_DUMP_CMD 0x00c0
SLIC_REG slic_dump_data; /* Dump data pointer */
ULONG pad26;
#define SLIC_DUMP_DATA 0x00c8
SLIC_REG slic_pcistatus; /* Read card's pci_status register */
ULONG pad27;
#define SLIC_PCISTATUS 0x00d0
SLIC_REG slic_wrhostid; /* Write hostid field */
ULONG pad28;
#define SLIC_WRHOSTID 0x00d8
#define SLIC_RDHOSTID_1GB 0x1554
#define SLIC_RDHOSTID_2GB 0x1554
SLIC_REG slic_low_power; /* Put card in a low power state */
ULONG pad29;
#define SLIC_LOW_POWER 0x00e0
SLIC_REG slic_quiesce; /* force slic into quiescent state
before soft reset */
ULONG pad30;
#define SLIC_QUIESCE 0x00e8
SLIC_REG slic_reset_iface; /* reset interface queues */
ULONG pad31;
#define SLIC_RESET_IFACE 0x00f0
SLIC_REG slic_addr_upper; /* Bits 63-32 for host i/f addrs */
ULONG pad32;
#define SLIC_ADDR_UPPER 0x00f8 /*Register is only written when it has changed*/
SLIC_REG slic_hbar64; /* 64 bit Header buffer address reg */
ULONG pad33;
#define SLIC_HBAR64 0x0100
SLIC_REG slic_dbar64; /* 64 bit Data buffer handle & address reg */
ULONG pad34;
#define SLIC_DBAR64 0x0108
SLIC_REG slic_cbar64; /* 64 bit Xmt Cmd buf addr regs. */
ULONG pad35;
#define SLIC_CBAR64 0x0110
SLIC_REG slic_rbar64; /* 64 bit Response buffer address reg.*/
ULONG pad36;
#define SLIC_RBAR64 0x0118
SLIC_REG slic_rcbar64; /* 64 bit Rcv Cmd buf addr reg*/
ULONG pad37;
#define SLIC_RCBAR64 0x0120
SLIC_REG slic_stats64; /*read statistics (64 bit UPR)*/
ULONG pad38;
#define SLIC_RSTAT64 0x0128
SLIC_REG slic_rcv_wcs; /*Download Gigabit RCV sequencer ucode*/
ULONG pad39;
#define SLIC_RCV_WCS 0x0130
#define SLIC_RCVWCS_BEGIN 0x40000000
#define SLIC_RCVWCS_FINISH 0x80000000
SLIC_REG slic_wrvlanid; /* Write VlanId field */
ULONG pad40;
#define SLIC_WRVLANID 0x0138
SLIC_REG slic_read_xf_info; /* Read Transformer info */
ULONG pad41;
#define SLIC_READ_XF_INFO 0x0140
SLIC_REG slic_write_xf_info; /* Write Transformer info */
ULONG pad42;
#define SLIC_WRITE_XF_INFO 0x0148
SLIC_REG RSVD1; /* TOE Only */
ULONG pad43;
SLIC_REG RSVD2; /* TOE Only */
ULONG pad44;
SLIC_REG RSVD3; /* TOE Only */
ULONG pad45;
SLIC_REG RSVD4; /* TOE Only */
ULONG pad46;
SLIC_REG slic_ticks_per_sec; /* Write card ticks per second */
ULONG pad47;
#define SLIC_TICKS_PER_SEC 0x0170
} __iomem slic_regs_t, *p_slic_regs_t, SLIC_REGS, *PSLIC_REGS;
typedef enum _UPR_REQUEST {
SLIC_UPR_STATS,
SLIC_UPR_RLSR,
SLIC_UPR_WCFG,
SLIC_UPR_RCONFIG,
SLIC_UPR_RPHY,
SLIC_UPR_ENLB,
SLIC_UPR_ENCT,
SLIC_UPR_PDWN,
SLIC_UPR_PING,
SLIC_UPR_DUMP,
} UPR_REQUEST;
typedef struct _inicpm_wakepattern {
ulong32 patternlength;
uchar pattern[SLIC_PM_PATTERNSIZE];
uchar mask[SLIC_PM_PATTERNSIZE];
} inicpm_wakepattern_t, *p_inicpm_wakepattern_t;
typedef struct _inicpm_state {
ulong32 powercaps;
ulong32 powerstate;
ulong32 wake_linkstatus;
ulong32 wake_magicpacket;
ulong32 wake_framepattern;
inicpm_wakepattern_t wakepattern[SLIC_PM_MAXPATTERNS];
} inicpm_state_t, *p_inicpm_state_t;
typedef struct _slicpm_packet_pattern {
ulong32 priority;
ulong32 reserved;
ulong32 masksize;
ulong32 patternoffset;
ulong32 patternsize;
ulong32 patternflags;
} slicpm_packet_pattern_t, *p_slicpm_packet_pattern_t;
typedef enum _slicpm_power_state {
slicpm_state_unspecified = 0,
slicpm_state_d0,
slicpm_state_d1,
slicpm_state_d2,
slicpm_state_d3,
slicpm_state_maximum
} slicpm_state_t, *p_slicpm_state_t;
typedef struct _slicpm_wakeup_capabilities {
slicpm_state_t min_magic_packet_wakeup;
slicpm_state_t min_pattern_wakeup;
slicpm_state_t min_link_change_wakeup;
} slicpm_wakeup_capabilities_t, *p_slicpm_wakeup_capabilities_t;
typedef struct _slic_pnp_capabilities {
ulong32 flags;
slicpm_wakeup_capabilities_t wakeup_capabilities;
} slic_pnp_capabilities_t, *p_slic_pnp_capabilities_t;
typedef struct _xmt_stats_t {
ulong32 xmit_tcp_bytes;
ulong32 xmit_tcp_segs;
ulong32 xmit_bytes;
ulong32 xmit_collisions;
ulong32 xmit_unicasts;
ulong32 xmit_other_error;
ulong32 xmit_excess_collisions;
} xmt_stats100_t;
typedef struct _rcv_stats_t {
ulong32 rcv_tcp_bytes;
ulong32 rcv_tcp_segs;
ulong32 rcv_bytes;
ulong32 rcv_unicasts;
ulong32 rcv_other_error;
ulong32 rcv_drops;
} rcv_stats100_t;
typedef struct _xmt_statsgb_t {
ulong64 xmit_tcp_bytes;
ulong64 xmit_tcp_segs;
ulong64 xmit_bytes;
ulong64 xmit_collisions;
ulong64 xmit_unicasts;
ulong64 xmit_other_error;
ulong64 xmit_excess_collisions;
} xmt_statsGB_t;
typedef struct _rcv_statsgb_t {
ulong64 rcv_tcp_bytes;
ulong64 rcv_tcp_segs;
ulong64 rcv_bytes;
ulong64 rcv_unicasts;
u64 rcv_other_error;
ulong64 rcv_drops;
} rcv_statsGB_t;
typedef struct _slic_stats {
union {
struct {
xmt_stats100_t xmt100;
rcv_stats100_t rcv100;
} stats_100;
struct {
xmt_statsGB_t xmtGB;
rcv_statsGB_t rcvGB;
} stats_GB;
} u;
} slic_stats_t, *p_slic_stats_t;
#define xmit_tcp_segs100 u.stats_100.xmt100.xmit_tcp_segs
#define xmit_tcp_bytes100 u.stats_100.xmt100.xmit_tcp_bytes
#define xmit_bytes100 u.stats_100.xmt100.xmit_bytes
#define xmit_collisions100 u.stats_100.xmt100.xmit_collisions
#define xmit_unicasts100 u.stats_100.xmt100.xmit_unicasts
#define xmit_other_error100 u.stats_100.xmt100.xmit_other_error
#define xmit_excess_collisions100 u.stats_100.xmt100.xmit_excess_collisions
#define rcv_tcp_segs100 u.stats_100.rcv100.rcv_tcp_segs
#define rcv_tcp_bytes100 u.stats_100.rcv100.rcv_tcp_bytes
#define rcv_bytes100 u.stats_100.rcv100.rcv_bytes
#define rcv_unicasts100 u.stats_100.rcv100.rcv_unicasts
#define rcv_other_error100 u.stats_100.rcv100.rcv_other_error
#define rcv_drops100 u.stats_100.rcv100.rcv_drops
#define xmit_tcp_segs_gb u.stats_GB.xmtGB.xmit_tcp_segs
#define xmit_tcp_bytes_gb u.stats_GB.xmtGB.xmit_tcp_bytes
#define xmit_bytes_gb u.stats_GB.xmtGB.xmit_bytes
#define xmit_collisions_gb u.stats_GB.xmtGB.xmit_collisions
#define xmit_unicasts_gb u.stats_GB.xmtGB.xmit_unicasts
#define xmit_other_error_gb u.stats_GB.xmtGB.xmit_other_error
#define xmit_excess_collisions_gb u.stats_GB.xmtGB.xmit_excess_collisions
#define rcv_tcp_segs_gb u.stats_GB.rcvGB.rcv_tcp_segs
#define rcv_tcp_bytes_gb u.stats_GB.rcvGB.rcv_tcp_bytes
#define rcv_bytes_gb u.stats_GB.rcvGB.rcv_bytes
#define rcv_unicasts_gb u.stats_GB.rcvGB.rcv_unicasts
#define rcv_other_error_gb u.stats_GB.rcvGB.rcv_other_error
#define rcv_drops_gb u.stats_GB.rcvGB.rcv_drops
typedef struct _slic_config_mac_t {
uchar macaddrA[6];
} slic_config_mac_t, *pslic_config_mac_t;
#define ATK_FRU_FORMAT 0x00
#define VENDOR1_FRU_FORMAT 0x01
#define VENDOR2_FRU_FORMAT 0x02
#define VENDOR3_FRU_FORMAT 0x03
#define VENDOR4_FRU_FORMAT 0x04
#define NO_FRU_FORMAT 0xFF
typedef struct _atk_fru_t {
uchar assembly[6];
uchar revision[2];
uchar serial[14];
uchar pad[3];
} atk_fru_t, *patk_fru_t;
typedef struct _vendor1_fru_t {
uchar commodity;
uchar assembly[4];
uchar revision[2];
uchar supplier[2];
uchar date[2];
uchar sequence[3];
uchar pad[13];
} vendor1_fru_t, *pvendor1_fru_t;
typedef struct _vendor2_fru_t {
uchar part[8];
uchar supplier[5];
uchar date[3];
uchar sequence[4];
uchar pad[7];
} vendor2_fru_t, *pvendor2_fru_t;
typedef struct _vendor3_fru_t {
uchar assembly[6];
uchar revision[2];
uchar serial[14];
uchar pad[3];
} vendor3_fru_t, *pvendor3_fru_t;
typedef struct _vendor4_fru_t {
uchar number[8];
uchar part[8];
uchar version[8];
uchar pad[3];
} vendor4_fru_t, *pvendor4_fru_t;
typedef union _oemfru_t {
vendor1_fru_t vendor1_fru;
vendor2_fru_t vendor2_fru;
vendor3_fru_t vendor3_fru;
vendor4_fru_t vendor4_fru;
} oemfru_t, *poemfru_t;
/*
SLIC EEPROM structure for Mojave
*/
typedef struct _slic_eeprom {
ushort Id; /* 00 EEPROM/FLASH Magic code 'A5A5'*/
ushort EecodeSize; /* 01 Size of EEPROM Codes (bytes * 4)*/
ushort FlashSize; /* 02 Flash size */
ushort EepromSize; /* 03 EEPROM Size */
ushort VendorId; /* 04 Vendor ID */
ushort DeviceId; /* 05 Device ID */
uchar RevisionId; /* 06 Revision ID */
uchar ClassCode[3]; /* 07 Class Code */
uchar DbgIntPin; /* 08 Debug Interrupt pin */
uchar NetIntPin0; /* Network Interrupt Pin */
uchar MinGrant; /* 09 Minimum grant */
uchar MaxLat; /* Maximum Latency */
ushort PciStatus; /* 10 PCI Status */
ushort SubSysVId; /* 11 Subsystem Vendor Id */
ushort SubSysId; /* 12 Subsystem ID */
ushort DbgDevId; /* 13 Debug Device Id */
ushort DramRomFn; /* 14 Dram/Rom function */
ushort DSize2Pci; /* 15 DRAM size to PCI (bytes * 64K) */
ushort RSize2Pci; /* 16 ROM extension size to PCI (bytes * 4k) */
uchar NetIntPin1; /* 17 Network Interface Pin 1 (simba/leone only) */
uchar NetIntPin2; /* Network Interface Pin 2 (simba/leone only) */
union {
uchar NetIntPin3;/* 18 Network Interface Pin 3 (simba only) */
uchar FreeTime;/* FreeTime setting (leone/mojave only) */
} u1;
uchar TBIctl; /* 10-bit interface control (Mojave only) */
ushort DramSize; /* 19 DRAM size (bytes * 64k) */
union {
struct {
/* Mac Interface Specific portions */
slic_config_mac_t MacInfo[SLIC_NBR_MACS];
} mac; /* MAC access for all boards */
struct {
/* use above struct for MAC access */
slic_config_mac_t pad[SLIC_NBR_MACS - 1];
ushort DeviceId2; /* Device ID for 2nd
PCI function */
uchar IntPin2; /* Interrupt pin for
2nd PCI function */
uchar ClassCode2[3]; /* Class Code for 2nd
PCI function */
} mojave; /* 2nd function access for gigabit board */
} u2;
ushort CfgByte6; /* Config Byte 6 */
ushort PMECapab; /* Power Mgment capabilities */
ushort NwClkCtrls; /* NetworkClockControls */
uchar FruFormat; /* Alacritech FRU format type */
atk_fru_t AtkFru; /* Alacritech FRU information */
uchar OemFruFormat; /* optional OEM FRU format type */
oemfru_t OemFru; /* optional OEM FRU information */
uchar Pad[4]; /* Pad to 128 bytes - includes 2 cksum bytes
*(if OEM FRU info exists) and two unusable
* bytes at the end */
} slic_eeprom_t, *pslic_eeprom_t;
/* SLIC EEPROM structure for Oasis */
typedef struct _oslic_eeprom_t {
ushort Id; /* 00 EEPROM/FLASH Magic code 'A5A5' */
ushort EecodeSize; /* 01 Size of EEPROM Codes (bytes * 4)*/
ushort FlashConfig0; /* 02 Flash Config for SPI device 0 */
ushort FlashConfig1; /* 03 Flash Config for SPI device 1 */
ushort VendorId; /* 04 Vendor ID */
ushort DeviceId; /* 05 Device ID (function 0) */
uchar RevisionId; /* 06 Revision ID */
uchar ClassCode[3]; /* 07 Class Code for PCI function 0 */
uchar IntPin1; /* 08 Interrupt pin for PCI function 1*/
uchar ClassCode2[3]; /* 09 Class Code for PCI function 1 */
uchar IntPin2; /* 10 Interrupt pin for PCI function 2*/
uchar IntPin0; /* Interrupt pin for PCI function 0*/
uchar MinGrant; /* 11 Minimum grant */
uchar MaxLat; /* Maximum Latency */
ushort SubSysVId; /* 12 Subsystem Vendor Id */
ushort SubSysId; /* 13 Subsystem ID */
ushort FlashSize; /* 14 Flash size (bytes / 4K) */
ushort DSize2Pci; /* 15 DRAM size to PCI (bytes / 64K) */
ushort RSize2Pci; /* 16 Flash (ROM extension) size to
PCI (bytes / 4K) */
ushort DeviceId1; /* 17 Device Id (function 1) */
ushort DeviceId2; /* 18 Device Id (function 2) */
ushort CfgByte6; /* 19 Device Status Config Bytes 6-7 */
ushort PMECapab; /* 20 Power Mgment capabilities */
uchar MSICapab; /* 21 MSI capabilities */
uchar ClockDivider; /* Clock divider */
ushort PciStatusLow; /* 22 PCI Status bits 15:0 */
ushort PciStatusHigh; /* 23 PCI Status bits 31:16 */
ushort DramConfigLow; /* 24 DRAM Configuration bits 15:0 */
ushort DramConfigHigh; /* 25 DRAM Configuration bits 31:16 */
ushort DramSize; /* 26 DRAM size (bytes / 64K) */
ushort GpioTbiCtl;/* 27 GPIO/TBI controls for functions 1/0 */
ushort EepromSize; /* 28 EEPROM Size */
slic_config_mac_t MacInfo[2]; /* 29 MAC addresses (2 ports) */
uchar FruFormat; /* 35 Alacritech FRU format type */
atk_fru_t AtkFru; /* Alacritech FRU information */
uchar OemFruFormat; /* optional OEM FRU format type */
oemfru_t OemFru; /* optional OEM FRU information */
uchar Pad[4]; /* Pad to 128 bytes - includes 2 checksum bytes
* (if OEM FRU info exists) and two unusable
* bytes at the end
*/
} oslic_eeprom_t, *poslic_eeprom_t;
#define MAX_EECODE_SIZE sizeof(slic_eeprom_t)
#define MIN_EECODE_SIZE 0x62 /* code size without optional OEM FRU stuff */
/* SLIC CONFIG structure
This structure lives in the CARD structure and is valid for all
board types. It is filled in from the appropriate EEPROM structure
by SlicGetConfigData().
*/
typedef struct _slic_config_t {
boolean EepromValid; /* Valid EEPROM flag (checksum good?) */
ushort DramSize; /* DRAM size (bytes / 64K) */
slic_config_mac_t MacInfo[SLIC_NBR_MACS]; /* MAC addresses */
uchar FruFormat; /* Alacritech FRU format type */
atk_fru_t AtkFru; /* Alacritech FRU information */
uchar OemFruFormat; /* optional OEM FRU format type */
union {
vendor1_fru_t vendor1_fru;
vendor2_fru_t vendor2_fru;
vendor3_fru_t vendor3_fru;
vendor4_fru_t vendor4_fru;
} OemFru;
} slic_config_t, *pslic_config_t;
#pragma pack()
#endif

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drivers/staging/slicoss/slicinc.h Normal file
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/**************************************************************************
*
* Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved.
*
* $Id: slicinc.h,v 1.4 2006/07/14 16:42:56 mook Exp $
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* The views and conclusions contained in the software and documentation
* are those of the authors and should not be interpreted as representing
* official policies, either expressed or implied, of Alacritech, Inc.
*
**************************************************************************/
/*
* FILENAME: slicinc.h
*
* This file contains all other include files and prototype definitions
* for the SLICOSS driver.
*/
#ifndef _SLIC_INCLUDE_H_
#define _SLIC_INCLUDE_H_
#include "slic_os.h"
#include "slicdbg.h"
#include "slichw.h"
#include "slic.h"
int slic_entry_probe(struct pci_dev *pcidev,
const struct pci_device_id *ent);
int slic_init(struct pci_dev *pcidev,
const struct pci_device_id *pci_tbl_entry,
long memaddr,
int chip_idx,
int acpi_idle_state);
void slic_entry_remove(struct pci_dev *pcidev);
void slic_init_driver(void);
int slic_entry_open(struct net_device *dev);
int slic_entry_halt(struct net_device *dev);
int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
int slic_xmit_start(struct sk_buff *skb, struct net_device *dev);
void slic_xmit_fail(p_adapter_t adapter,
struct sk_buff *skb,
pvoid cmd,
ulong32 skbtype,
ulong32 status);
void slic_xmit_timeout(struct net_device *dev);
void slic_config_pci(struct pci_dev *pcidev);
struct sk_buff *slic_rcvqueue_getnext(p_adapter_t adapter);
inline void slic_reg32_write(void __iomem *reg, ulong32 value, uint flush);
inline void slic_reg64_write(p_adapter_t adapter, void __iomem *reg,
ulong32 value, void __iomem *regh, ulong32 paddrh, uint flush);
inline ulong32 slic_reg32_read(pulong32 reg, uint flush);
inline ulong32 slic_reg16_read(pulong32 reg, uint flush);
#if SLIC_GET_STATS_ENABLED
struct net_device_stats *slic_get_stats(struct net_device *dev);
#endif
int slic_mac_set_address(struct net_device *dev, pvoid ptr);
int slicproc_card_read(char *page, char **start, off_t off, int count,
int *eof, void *data);
int slicproc_card_write(struct file *file, const char __user *buffer,
ulong count, void *data);
void slicproc_card_create(p_sliccard_t card);
void slicproc_card_destroy(p_sliccard_t card);
int slicproc_adapter_read(char *page, char **start, off_t off, int count,
int *eof, void *data);
int slicproc_adapter_write(struct file *file, const char __user *buffer,
ulong count, void *data);
void slicproc_adapter_create(p_adapter_t adapter);
void slicproc_adapter_destroy(p_adapter_t adapter);
void slicproc_create(void);
void slicproc_destroy(void);
void slic_interrupt_process(p_adapter_t adapter, ulong32 isr);
void slic_rcv_handler(p_adapter_t adapter);
void slic_upr_handler(p_adapter_t adapter);
void slic_link_event_handler(p_adapter_t adapter);
void slic_xmit_complete(p_adapter_t adapter);
void slic_upr_request_complete(p_adapter_t adapter, ulong32 isr);
int slic_rspqueue_init(p_adapter_t adapter);
int slic_rspqueue_reset(p_adapter_t adapter);
void slic_rspqueue_free(p_adapter_t adapter);
p_slic_rspbuf_t slic_rspqueue_getnext(p_adapter_t adapter);
void slic_cmdqmem_init(p_adapter_t adapter);
void slic_cmdqmem_free(p_adapter_t adapter);
pulong32 slic_cmdqmem_addpage(p_adapter_t adapter);
int slic_cmdq_init(p_adapter_t adapter);
void slic_cmdq_free(p_adapter_t adapter);
void slic_cmdq_reset(p_adapter_t adapter);
void slic_cmdq_addcmdpage(p_adapter_t adapter, pulong32 page);
void slic_cmdq_getdone(p_adapter_t adapter);
void slic_cmdq_putdone(p_adapter_t adapter, p_slic_hostcmd_t cmd);
void slic_cmdq_putdone_irq(p_adapter_t adapter, p_slic_hostcmd_t cmd);
p_slic_hostcmd_t slic_cmdq_getfree(p_adapter_t adapter);
int slic_rcvqueue_init(p_adapter_t adapter);
int slic_rcvqueue_reset(p_adapter_t adapter);
int slic_rcvqueue_fill(p_adapter_t adapter);
ulong32 slic_rcvqueue_reinsert(p_adapter_t adapter, struct sk_buff *skb);
void slic_rcvqueue_free(p_adapter_t adapter);
void slic_rcv_handle_error(p_adapter_t adapter, p_slic_rcvbuf_t rcvbuf);
void slic_adapter_set_hwaddr(p_adapter_t adapter);
void slic_card_halt(p_sliccard_t card, p_adapter_t adapter);
int slic_card_init(p_sliccard_t card, p_adapter_t adapter);
void slic_intagg_set(p_adapter_t adapter, ulong32 value);
int slic_card_download(p_adapter_t adapter);
ulong32 slic_card_locate(p_adapter_t adapter);
int slic_card_removeadapter(p_adapter_t adapter);
void slic_card_remaster(p_adapter_t adapter);
void slic_card_softreset(p_adapter_t adapter);
void slic_card_up(p_adapter_t adapter);
void slic_card_down(p_adapter_t adapter);
void slic_if_stop_queue(p_adapter_t adapter);
void slic_if_start_queue(p_adapter_t adapter);
int slic_if_init(p_adapter_t adapter);
void slic_adapter_close(p_adapter_t adapter);
int slic_adapter_allocresources(p_adapter_t adapter);
void slic_adapter_freeresources(p_adapter_t adapter);
void slic_link_config(p_adapter_t adapter, ulong32 linkspeed,
ulong32 linkduplex);
void slic_unmap_mmio_space(p_adapter_t adapter);
void slic_card_cleanup(p_sliccard_t card);
void slic_init_cleanup(p_adapter_t adapter);
void slic_card_reclaim_buffers(p_adapter_t adapter);
void slic_soft_reset(p_adapter_t adapter);
void slic_card_reset(p_adapter_t adapter);
boolean slic_mac_filter(p_adapter_t adapter, p_ether_header ether_frame);
void slic_mac_address_config(p_adapter_t adapter);
void slic_mac_config(p_adapter_t adapter);
void slic_mcast_set_mask(p_adapter_t adapter);
void slic_mac_setmcastaddrs(p_adapter_t adapter);
int slic_mcast_add_list(p_adapter_t adapter, pchar address);
uchar slic_mcast_get_mac_hash(pchar macaddr);
void slic_mcast_set_bit(p_adapter_t adapter, pchar address);
void slic_config_set(p_adapter_t adapter, boolean linkchange);
void slic_config_clear(p_adapter_t adapter);
void slic_config_get(p_adapter_t adapter, ulong32 config, ulong32 configh);
void slic_timer_get_stats(ulong device);
void slic_timer_load_check(ulong context);
void slic_timer_ping(ulong dev);
void slic_stall_msec(int stall);
void slic_stall_usec(int stall);
void slic_assert_fail(void);
ushort slic_eeprom_cksum(pchar m, int len);
/* upr */
void slic_upr_start(p_adapter_t adapter);
void slic_link_upr_complete(p_adapter_t adapter, ulong32 Isr);
int slic_upr_request(p_adapter_t adapter,
ulong32 upr_request,
ulong32 upr_data,
ulong32 upr_data_h,
ulong32 upr_buffer,
ulong32 upr_buffer_h);
int slic_upr_queue_request(p_adapter_t adapter,
ulong32 upr_request,
ulong32 upr_data,
ulong32 upr_data_h,
ulong32 upr_buffer,
ulong32 upr_buffer_h);
void slic_mcast_set_list(struct net_device *dev);
void slic_mcast_init_crc32(void);
#if SLIC_DUMP_ENABLED
int slic_dump_thread(void *context);
uint slic_init_dump_thread(p_sliccard_t card);
uchar slic_get_dump_index(pchar path);
ulong32 slic_dump_card(p_sliccard_t card, boolean resume);
ulong32 slic_dump_halt(p_sliccard_t card, uchar proc);
ulong32 slic_dump_reg(p_sliccard_t card, uchar proc);
ulong32 slic_dump_data(p_sliccard_t card, ulong32 addr,
ushort count, uchar desc);
ulong32 slic_dump_queue(p_sliccard_t card, ulong32 buf_phys,
ulong32 buf_physh, ulong32 queue);
ulong32 slic_dump_load_queue(p_sliccard_t card, ulong32 data, ulong32 queue);
ulong32 slic_dump_cam(p_sliccard_t card, ulong32 addr,
ulong32 count, uchar desc);
ulong32 slic_dump_resume(p_sliccard_t card, uchar proc);
ulong32 slic_dump_send_cmd(p_sliccard_t card, ulong32 cmd_phys,
ulong32 cmd_physh, ulong32 buf_phys,
ulong32 buf_physh);
#define create_file(x) STATUS_SUCCESS
#define write_file(w, x, y, z) STATUS_SUCCESS
#define close_file(x) STATUS_SUCCESS
#define read_file(w, x, y, z) STATUS_SUCCESS
#define open_file(x) STATUS_SUCCESS
/* PAGE_SIZE * 16 */
#define DUMP_PAGE_SIZE 0xFFFF
#define DUMP_PAGE_SIZE_HALF 0x7FFE
#endif
#endif /* _SLIC_INCLUDE_H_ */

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