[IA64] reformat pal.S to fit in 80 columns, fix typos
Reformat to fit in 80 columns. Fix a couple typos. Remove a couple unused labels. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Bjorn Helgaas
Tony Luck
parent
c12fb18857
commit
4d5a31977c
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@ -21,11 +21,12 @@ pal_entry_point:
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.text
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/*
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* Set the PAL entry point address. This could be written in C code, but we do it here
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* to keep it all in one module (besides, it's so trivial that it's
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* Set the PAL entry point address. This could be written in C code, but we
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* do it here to keep it all in one module (besides, it's so trivial that it's
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* not a big deal).
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*
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* in0 Address of the PAL entry point (text address, NOT a function descriptor).
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* in0 Address of the PAL entry point (text address, NOT a function
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* descriptor).
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*/
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GLOBAL_ENTRY(ia64_pal_handler_init)
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alloc r3=ar.pfs,1,0,0,0
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@ -36,9 +37,9 @@ GLOBAL_ENTRY(ia64_pal_handler_init)
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END(ia64_pal_handler_init)
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/*
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* Default PAL call handler. This needs to be coded in assembly because it uses
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* the static calling convention, i.e., the RSE may not be used and calls are
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* done via "br.cond" (not "br.call").
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* Default PAL call handler. This needs to be coded in assembly because it
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* uses the static calling convention, i.e., the RSE may not be used and
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* calls are done via "br.cond" (not "br.call").
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*/
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GLOBAL_ENTRY(ia64_pal_default_handler)
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mov r8=-1
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@ -91,8 +92,8 @@ END(ia64_pal_call_static)
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* Make a PAL call using the stacked registers calling convention.
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*
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* Inputs:
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* in0 Index of PAL service
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* in2 - in3 Remaning PAL arguments
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* in0 Index of PAL service
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* in2 - in3 Remaining PAL arguments
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*/
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GLOBAL_ENTRY(ia64_pal_call_stacked)
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.prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(4)
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@ -126,18 +127,18 @@ END(ia64_pal_call_stacked)
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* Make a physical mode PAL call using the static registers calling convention.
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*
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* Inputs:
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* in0 Index of PAL service
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* in2 - in3 Remaning PAL arguments
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* in0 Index of PAL service
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* in2 - in3 Remaining PAL arguments
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*
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* PSR_LP, PSR_TB, PSR_ID, PSR_DA are never set by the kernel.
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* So we don't need to clear them.
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*/
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#define PAL_PSR_BITS_TO_CLEAR \
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(IA64_PSR_I | IA64_PSR_IT | IA64_PSR_DT | IA64_PSR_DB | IA64_PSR_RT | \
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IA64_PSR_DD | IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED | \
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#define PAL_PSR_BITS_TO_CLEAR \
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(IA64_PSR_I | IA64_PSR_IT | IA64_PSR_DT | IA64_PSR_DB | IA64_PSR_RT |\
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IA64_PSR_DD | IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED | \
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IA64_PSR_DFL | IA64_PSR_DFH)
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#define PAL_PSR_BITS_TO_SET \
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#define PAL_PSR_BITS_TO_SET \
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(IA64_PSR_BN)
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@ -173,7 +174,7 @@ GLOBAL_ENTRY(ia64_pal_call_phys_static)
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;;
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andcm r16=loc3,r16 // removes bits to clear from psr
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br.call.sptk.many rp=ia64_switch_mode_phys
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.ret1: mov rp = r8 // install return address (physical)
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mov rp = r8 // install return address (physical)
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mov loc5 = r19
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mov loc6 = r20
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br.cond.sptk.many b7
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@ -183,7 +184,6 @@ GLOBAL_ENTRY(ia64_pal_call_phys_static)
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mov r19=loc5
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mov r20=loc6
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br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode
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.ret2:
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mov psr.l = loc3 // restore init PSR
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mov ar.pfs = loc1
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@ -198,8 +198,8 @@ END(ia64_pal_call_phys_static)
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* Make a PAL call using the stacked registers in physical mode.
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*
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* Inputs:
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* in0 Index of PAL service
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* in2 - in3 Remaning PAL arguments
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* in0 Index of PAL service
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* in2 - in3 Remaining PAL arguments
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*/
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GLOBAL_ENTRY(ia64_pal_call_phys_stacked)
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.prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(5)
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@ -207,7 +207,7 @@ GLOBAL_ENTRY(ia64_pal_call_phys_stacked)
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movl loc2 = pal_entry_point
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1: {
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mov r28 = in0 // copy procedure index
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mov loc0 = rp // save rp
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mov loc0 = rp // save rp
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}
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.body
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;;
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@ -240,7 +240,7 @@ GLOBAL_ENTRY(ia64_pal_call_phys_stacked)
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mov r16=loc3 // r16= original psr
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mov r19=loc5
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mov r20=loc6
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br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode
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br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode
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mov psr.l = loc3 // restore init PSR
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mov ar.pfs = loc1
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@ -252,10 +252,11 @@ GLOBAL_ENTRY(ia64_pal_call_phys_stacked)
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END(ia64_pal_call_phys_stacked)
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/*
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* Save scratch fp scratch regs which aren't saved in pt_regs already (fp10-fp15).
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* Save scratch fp scratch regs which aren't saved in pt_regs already
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* (fp10-fp15).
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*
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* NOTE: We need to do this since firmware (SAL and PAL) may use any of the scratch
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* regs fp-low partition.
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* NOTE: We need to do this since firmware (SAL and PAL) may use any of the
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* scratch regs fp-low partition.
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*
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* Inputs:
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* in0 Address of stack storage for fp regs
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