coresight: adding basic support for D01 board
Support for 16 PTMs, funnel, TPIU and replicator connected to the ETB are included. Signed-off-by: Xia Kaixu <kaixu.xia@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
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commit
4d5616ca59
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@ -190,6 +190,12 @@
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clock-frequency = <168000000>;
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};
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clk_375m: clk_375m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <375000000>;
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};
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soc {
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/* It's a 32-bit SoC. */
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#address-cells = <1>;
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@ -264,4 +270,715 @@
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};
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};
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etb@0,e3c42000 {
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compatible = "arm,coresight-etb10", "arm,primecell";
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reg = <0 0xe3c42000 0 0x1000>;
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coresight-default-sink;
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clocks = <&clk_375m>;
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clock-names = "apb_pclk";
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port {
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etb0_in_port: endpoint@0 {
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slave-mode;
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remote-endpoint = <&replicator0_out_port0>;
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};
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};
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};
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etb@0,e3c82000 {
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compatible = "arm,coresight-etb10", "arm,primecell";
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reg = <0 0xe3c82000 0 0x1000>;
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clocks = <&clk_375m>;
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clock-names = "apb_pclk";
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port {
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etb1_in_port: endpoint@0 {
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slave-mode;
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remote-endpoint = <&replicator1_out_port0>;
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};
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};
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};
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etb@0,e3cc2000 {
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compatible = "arm,coresight-etb10", "arm,primecell";
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reg = <0 0xe3cc2000 0 0x1000>;
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clocks = <&clk_375m>;
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clock-names = "apb_pclk";
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port {
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etb2_in_port: endpoint@0 {
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slave-mode;
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remote-endpoint = <&replicator2_out_port0>;
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};
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};
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};
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etb@0,e3d02000 {
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compatible = "arm,coresight-etb10", "arm,primecell";
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reg = <0 0xe3d02000 0 0x1000>;
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clocks = <&clk_375m>;
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clock-names = "apb_pclk";
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port {
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etb3_in_port: endpoint@0 {
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slave-mode;
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remote-endpoint = <&replicator3_out_port0>;
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};
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};
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};
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tpiu@0,e3c05000 {
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compatible = "arm,coresight-tpiu", "arm,primecell";
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reg = <0 0xe3c05000 0 0x1000>;
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clocks = <&clk_375m>;
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clock-names = "apb_pclk";
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port {
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tpiu_in_port: endpoint@0 {
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slave-mode;
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remote-endpoint = <&funnel4_out_port0>;
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};
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};
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};
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replicator0 {
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/* non-configurable replicators don't show up on the
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* AMBA bus. As such no need to add "arm,primecell".
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*/
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compatible = "arm,coresight-replicator";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* replicator output ports */
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port@0 {
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reg = <0>;
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replicator0_out_port0: endpoint {
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remote-endpoint = <&etb0_in_port>;
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};
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};
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port@1 {
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reg = <1>;
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replicator0_out_port1: endpoint {
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remote-endpoint = <&funnel4_in_port0>;
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};
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};
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/* replicator input port */
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port@2 {
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reg = <0>;
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replicator0_in_port0: endpoint {
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slave-mode;
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remote-endpoint = <&funnel0_out_port0>;
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};
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};
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};
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};
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replicator1 {
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/* non-configurable replicators don't show up on the
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* AMBA bus. As such no need to add "arm,primecell".
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*/
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compatible = "arm,coresight-replicator";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* replicator output ports */
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port@0 {
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reg = <0>;
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replicator1_out_port0: endpoint {
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remote-endpoint = <&etb1_in_port>;
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};
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};
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port@1 {
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reg = <1>;
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replicator1_out_port1: endpoint {
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remote-endpoint = <&funnel4_in_port1>;
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};
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};
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/* replicator input port */
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port@2 {
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reg = <0>;
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replicator1_in_port0: endpoint {
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slave-mode;
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remote-endpoint = <&funnel1_out_port0>;
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};
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};
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};
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};
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replicator2 {
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/* non-configurable replicators don't show up on the
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* AMBA bus. As such no need to add "arm,primecell".
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*/
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compatible = "arm,coresight-replicator";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* replicator output ports */
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port@0 {
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reg = <0>;
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replicator2_out_port0: endpoint {
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remote-endpoint = <&etb2_in_port>;
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};
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};
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port@1 {
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reg = <1>;
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replicator2_out_port1: endpoint {
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remote-endpoint = <&funnel4_in_port2>;
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};
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};
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/* replicator input port */
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port@2 {
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reg = <0>;
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replicator2_in_port0: endpoint {
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slave-mode;
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remote-endpoint = <&funnel2_out_port0>;
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};
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};
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};
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};
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replicator3 {
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/* non-configurable replicators don't show up on the
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* AMBA bus. As such no need to add "arm,primecell".
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*/
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compatible = "arm,coresight-replicator";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* replicator output ports */
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port@0 {
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reg = <0>;
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replicator3_out_port0: endpoint {
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remote-endpoint = <&etb3_in_port>;
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};
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};
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port@1 {
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reg = <1>;
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replicator3_out_port1: endpoint {
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remote-endpoint = <&funnel4_in_port3>;
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};
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};
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/* replicator input port */
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port@2 {
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reg = <0>;
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replicator3_in_port0: endpoint {
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slave-mode;
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remote-endpoint = <&funnel3_out_port0>;
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};
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};
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};
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};
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funnel@0,e3c41000 {
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compatible = "arm,coresight-funnel", "arm,primecell";
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reg = <0 0xe3c41000 0 0x1000>;
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clocks = <&clk_375m>;
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clock-names = "apb_pclk";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* funnel output port */
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port@0 {
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reg = <0>;
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funnel0_out_port0: endpoint {
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remote-endpoint =
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<&replicator0_in_port0>;
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};
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};
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/* funnel input ports */
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port@1 {
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reg = <0>;
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funnel0_in_port0: endpoint {
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slave-mode;
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remote-endpoint = <&ptm0_out_port>;
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};
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};
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port@2 {
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reg = <1>;
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funnel0_in_port1: endpoint {
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slave-mode;
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remote-endpoint = <&ptm1_out_port>;
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};
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};
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port@3 {
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reg = <2>;
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funnel0_in_port2: endpoint {
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slave-mode;
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remote-endpoint = <&ptm2_out_port>;
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};
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};
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port@4 {
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reg = <3>;
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funnel0_in_port3: endpoint {
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slave-mode;
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remote-endpoint = <&ptm3_out_port>;
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};
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};
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};
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};
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funnel@0,e3c81000 {
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compatible = "arm,coresight-funnel", "arm,primecell";
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reg = <0 0xe3c81000 0 0x1000>;
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clocks = <&clk_375m>;
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clock-names = "apb_pclk";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* funnel output port */
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port@0 {
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reg = <0>;
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funnel1_out_port0: endpoint {
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remote-endpoint =
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<&replicator1_in_port0>;
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};
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};
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/* funnel input ports */
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port@1 {
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reg = <0>;
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funnel1_in_port0: endpoint {
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slave-mode;
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remote-endpoint = <&ptm4_out_port>;
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};
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};
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port@2 {
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reg = <1>;
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funnel1_in_port1: endpoint {
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slave-mode;
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remote-endpoint = <&ptm5_out_port>;
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};
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};
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port@3 {
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reg = <2>;
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funnel1_in_port2: endpoint {
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slave-mode;
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remote-endpoint = <&ptm6_out_port>;
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};
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};
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port@4 {
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reg = <3>;
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funnel1_in_port3: endpoint {
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slave-mode;
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remote-endpoint = <&ptm7_out_port>;
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};
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};
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};
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};
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funnel@0,e3cc1000 {
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compatible = "arm,coresight-funnel", "arm,primecell";
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reg = <0 0xe3cc1000 0 0x1000>;
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clocks = <&clk_375m>;
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clock-names = "apb_pclk";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* funnel output port */
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port@0 {
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reg = <0>;
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funnel2_out_port0: endpoint {
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remote-endpoint =
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<&replicator2_in_port0>;
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};
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};
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/* funnel input ports */
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port@1 {
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reg = <0>;
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funnel2_in_port0: endpoint {
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slave-mode;
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remote-endpoint = <&ptm8_out_port>;
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};
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};
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port@2 {
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reg = <1>;
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funnel2_in_port1: endpoint {
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slave-mode;
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remote-endpoint = <&ptm9_out_port>;
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};
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};
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port@3 {
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reg = <2>;
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funnel2_in_port2: endpoint {
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slave-mode;
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remote-endpoint = <&ptm10_out_port>;
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};
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};
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port@4 {
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reg = <3>;
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funnel2_in_port3: endpoint {
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slave-mode;
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remote-endpoint = <&ptm11_out_port>;
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};
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};
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};
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};
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funnel@0,e3d01000 {
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compatible = "arm,coresight-funnel", "arm,primecell";
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reg = <0 0xe3d01000 0 0x1000>;
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clocks = <&clk_375m>;
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clock-names = "apb_pclk";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* funnel output port */
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port@0 {
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reg = <0>;
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funnel3_out_port0: endpoint {
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remote-endpoint =
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<&replicator3_in_port0>;
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};
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};
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/* funnel input ports */
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port@1 {
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reg = <0>;
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funnel3_in_port0: endpoint {
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slave-mode;
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remote-endpoint = <&ptm12_out_port>;
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};
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};
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port@2 {
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reg = <1>;
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funnel3_in_port1: endpoint {
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slave-mode;
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remote-endpoint = <&ptm13_out_port>;
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};
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};
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port@3 {
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reg = <2>;
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funnel3_in_port2: endpoint {
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slave-mode;
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remote-endpoint = <&ptm14_out_port>;
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};
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};
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port@4 {
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reg = <3>;
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funnel3_in_port3: endpoint {
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slave-mode;
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remote-endpoint = <&ptm15_out_port>;
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};
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};
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};
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};
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funnel@0,e3c04000 {
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compatible = "arm,coresight-funnel", "arm,primecell";
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reg = <0 0xe3c04000 0 0x1000>;
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clocks = <&clk_375m>;
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clock-names = "apb_pclk";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* funnel output port */
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port@0 {
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reg = <0>;
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funnel4_out_port0: endpoint {
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remote-endpoint = <&tpiu_in_port>;
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};
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};
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/* funnel input ports */
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port@1 {
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reg = <0>;
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funnel4_in_port0: endpoint {
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slave-mode;
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remote-endpoint =
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<&replicator0_out_port1>;
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};
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};
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port@2 {
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reg = <1>;
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funnel4_in_port1: endpoint {
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slave-mode;
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remote-endpoint =
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<&replicator1_out_port1>;
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};
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};
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port@3 {
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reg = <2>;
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funnel4_in_port2: endpoint {
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slave-mode;
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remote-endpoint =
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<&replicator2_out_port1>;
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};
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};
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port@4 {
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reg = <3>;
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funnel4_in_port3: endpoint {
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slave-mode;
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remote-endpoint =
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<&replicator3_out_port1>;
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};
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};
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};
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};
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ptm@0,e3c7c000 {
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compatible = "arm,coresight-etm3x", "arm,primecell";
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reg = <0 0xe3c7c000 0 0x1000>;
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clocks = <&clk_375m>;
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clock-names = "apb_pclk";
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cpu = <&CPU0>;
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port {
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ptm0_out_port: endpoint {
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remote-endpoint = <&funnel0_in_port0>;
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};
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};
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};
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ptm@0,e3c7d000 {
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compatible = "arm,coresight-etm3x", "arm,primecell";
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reg = <0 0xe3c7d000 0 0x1000>;
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clocks = <&clk_375m>;
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clock-names = "apb_pclk";
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cpu = <&CPU1>;
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port {
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ptm1_out_port: endpoint {
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remote-endpoint = <&funnel0_in_port1>;
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};
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};
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};
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ptm@0,e3c7e000 {
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compatible = "arm,coresight-etm3x", "arm,primecell";
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reg = <0 0xe3c7e000 0 0x1000>;
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clocks = <&clk_375m>;
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clock-names = "apb_pclk";
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cpu = <&CPU2>;
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port {
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ptm2_out_port: endpoint {
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remote-endpoint = <&funnel0_in_port2>;
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};
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};
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};
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ptm@0,e3c7f000 {
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compatible = "arm,coresight-etm3x", "arm,primecell";
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reg = <0 0xe3c7f000 0 0x1000>;
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clocks = <&clk_375m>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&CPU3>;
|
||||
port {
|
||||
ptm3_out_port: endpoint {
|
||||
remote-endpoint = <&funnel0_in_port3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ptm@0,e3cbc000 {
|
||||
compatible = "arm,coresight-etm3x", "arm,primecell";
|
||||
reg = <0 0xe3cbc000 0 0x1000>;
|
||||
|
||||
clocks = <&clk_375m>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&CPU4>;
|
||||
port {
|
||||
ptm4_out_port: endpoint {
|
||||
remote-endpoint = <&funnel1_in_port0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ptm@0,e3cbd000 {
|
||||
compatible = "arm,coresight-etm3x", "arm,primecell";
|
||||
reg = <0 0xe3cbd000 0 0x1000>;
|
||||
|
||||
clocks = <&clk_375m>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&CPU5>;
|
||||
port {
|
||||
ptm5_out_port: endpoint {
|
||||
remote-endpoint = <&funnel1_in_port1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ptm@0,e3cbe000 {
|
||||
compatible = "arm,coresight-etm3x", "arm,primecell";
|
||||
reg = <0 0xe3cbe000 0 0x1000>;
|
||||
|
||||
clocks = <&clk_375m>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&CPU6>;
|
||||
port {
|
||||
ptm6_out_port: endpoint {
|
||||
remote-endpoint = <&funnel1_in_port2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ptm@0,e3cbf000 {
|
||||
compatible = "arm,coresight-etm3x", "arm,primecell";
|
||||
reg = <0 0xe3cbf000 0 0x1000>;
|
||||
|
||||
clocks = <&clk_375m>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&CPU7>;
|
||||
port {
|
||||
ptm7_out_port: endpoint {
|
||||
remote-endpoint = <&funnel1_in_port3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ptm@0,e3cfc000 {
|
||||
compatible = "arm,coresight-etm3x", "arm,primecell";
|
||||
reg = <0 0xe3cfc000 0 0x1000>;
|
||||
|
||||
clocks = <&clk_375m>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&CPU8>;
|
||||
port {
|
||||
ptm8_out_port: endpoint {
|
||||
remote-endpoint = <&funnel2_in_port0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ptm@0,e3cfd000 {
|
||||
compatible = "arm,coresight-etm3x", "arm,primecell";
|
||||
reg = <0 0xe3cfd000 0 0x1000>;
|
||||
clocks = <&clk_375m>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&CPU9>;
|
||||
port {
|
||||
ptm9_out_port: endpoint {
|
||||
remote-endpoint = <&funnel2_in_port1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ptm@0,e3cfe000 {
|
||||
compatible = "arm,coresight-etm3x", "arm,primecell";
|
||||
reg = <0 0xe3cfe000 0 0x1000>;
|
||||
|
||||
clocks = <&clk_375m>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&CPU10>;
|
||||
port {
|
||||
ptm10_out_port: endpoint {
|
||||
remote-endpoint = <&funnel2_in_port2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ptm@0,e3cff000 {
|
||||
compatible = "arm,coresight-etm3x", "arm,primecell";
|
||||
reg = <0 0xe3cff000 0 0x1000>;
|
||||
|
||||
clocks = <&clk_375m>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&CPU11>;
|
||||
port {
|
||||
ptm11_out_port: endpoint {
|
||||
remote-endpoint = <&funnel2_in_port3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ptm@0,e3d3c000 {
|
||||
compatible = "arm,coresight-etm3x", "arm,primecell";
|
||||
reg = <0 0xe3d3c000 0 0x1000>;
|
||||
|
||||
clocks = <&clk_375m>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&CPU12>;
|
||||
port {
|
||||
ptm12_out_port: endpoint {
|
||||
remote-endpoint = <&funnel3_in_port0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ptm@0,e3d3d000 {
|
||||
compatible = "arm,coresight-etm3x", "arm,primecell";
|
||||
reg = <0 0xe3d3d000 0 0x1000>;
|
||||
|
||||
clocks = <&clk_375m>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&CPU13>;
|
||||
port {
|
||||
ptm13_out_port: endpoint {
|
||||
remote-endpoint = <&funnel3_in_port1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ptm@0,e3d3e000 {
|
||||
compatible = "arm,coresight-etm3x", "arm,primecell";
|
||||
reg = <0 0xe3d3e000 0 0x1000>;
|
||||
|
||||
clocks = <&clk_375m>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&CPU14>;
|
||||
port {
|
||||
ptm14_out_port: endpoint {
|
||||
remote-endpoint = <&funnel3_in_port2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ptm@0,e3d3f000 {
|
||||
compatible = "arm,coresight-etm3x", "arm,primecell";
|
||||
reg = <0 0xe3d3f000 0 0x1000>;
|
||||
|
||||
clocks = <&clk_375m>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&CPU15>;
|
||||
port {
|
||||
ptm15_out_port: endpoint {
|
||||
remote-endpoint = <&funnel3_in_port3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
Loading…
Reference in New Issue