UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

cpufreq: ti-cpufreq: Introduce quirks to handle syscon fails appropriately 

[ Upstream commit abc00ffda43bd4ba85896713464c7510c39f8165 ]

Commit b4bc9f9e27 ("cpufreq: ti-cpufreq: add support for omap34xx
and omap36xx") introduced special handling for OMAP3 class devices
where syscon node may not be present. However, this also creates a bug
where the syscon node is present, however the offset used to read
is beyond the syscon defined range.

Fix this by providing a quirk option that is populated when such
special handling is required. This allows proper failure for all other
platforms when the syscon node and efuse offsets are mismatched.

Fixes: b4bc9f9e27 ("cpufreq: ti-cpufreq: add support for omap34xx and omap36xx")
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Nishanth Menon 2024-08-28 08:19:15 -05:00 committed by Greg Kroah-Hartman
parent c902e515b6
commit 4d3608ae15
1 changed files with 8 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/cpufreq/ti-cpufreq.c
View File

@ -61,6 +61,9 @@ struct ti_cpufreq_soc_data {
unsigned long efuse_shift; unsigned long efuse_shift;
unsigned long rev_offset; unsigned long rev_offset;
bool multi_regulator; bool multi_regulator;
/* Backward compatibility hack: Might have missing syscon */
#define TI_QUIRK_SYSCON_MAY_BE_MISSING 0x1
u8 quirks;
}; };
struct ti_cpufreq_data { struct ti_cpufreq_data {
@ -182,6 +185,7 @@ static struct ti_cpufreq_soc_data omap34xx_soc_data = {
.efuse_mask = BIT(3), .efuse_mask = BIT(3),
.rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE, .rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,
.multi_regulator = false, .multi_regulator = false,
.quirks = TI_QUIRK_SYSCON_MAY_BE_MISSING,
}; };
/* /*
@ -209,6 +213,7 @@ static struct ti_cpufreq_soc_data omap36xx_soc_data = {
.efuse_mask = BIT(9), .efuse_mask = BIT(9),
.rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE, .rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,
.multi_regulator = true, .multi_regulator = true,
.quirks = TI_QUIRK_SYSCON_MAY_BE_MISSING,
}; };
/* /*
@ -223,6 +228,7 @@ static struct ti_cpufreq_soc_data am3517_soc_data = {
.efuse_mask = 0, .efuse_mask = 0,
.rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE, .rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,
.multi_regulator = false, .multi_regulator = false,
.quirks = TI_QUIRK_SYSCON_MAY_BE_MISSING,
}; };
static struct ti_cpufreq_soc_data am625_soc_data = { static struct ti_cpufreq_soc_data am625_soc_data = {
@ -250,7 +256,7 @@ static int ti_cpufreq_get_efuse(struct ti_cpufreq_data *opp_data,
ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset, ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
&efuse); &efuse);
if (ret == -EIO) { if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) {
/* not a syscon register! */ /* not a syscon register! */
void __iomem *regs = ioremap(OMAP3_SYSCON_BASE + void __iomem *regs = ioremap(OMAP3_SYSCON_BASE +
opp_data->soc_data->efuse_offset, 4); opp_data->soc_data->efuse_offset, 4);
@ -291,7 +297,7 @@ static int ti_cpufreq_get_rev(struct ti_cpufreq_data *opp_data,
ret = regmap_read(opp_data->syscon, opp_data->soc_data->rev_offset, ret = regmap_read(opp_data->syscon, opp_data->soc_data->rev_offset,
&revision); &revision);
if (ret == -EIO) { if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) {
/* not a syscon register! */ /* not a syscon register! */
void __iomem *regs = ioremap(OMAP3_SYSCON_BASE + void __iomem *regs = ioremap(OMAP3_SYSCON_BASE +
opp_data->soc_data->rev_offset, 4); opp_data->soc_data->rev_offset, 4);