cpufreq: ti-cpufreq: Introduce quirks to handle syscon fails appropriately
[ Upstream commit abc00ffda43bd4ba85896713464c7510c39f8165 ] Commitb4bc9f9e27
("cpufreq: ti-cpufreq: add support for omap34xx and omap36xx") introduced special handling for OMAP3 class devices where syscon node may not be present. However, this also creates a bug where the syscon node is present, however the offset used to read is beyond the syscon defined range. Fix this by providing a quirk option that is populated when such special handling is required. This allows proper failure for all other platforms when the syscon node and efuse offsets are mismatched. Fixes:b4bc9f9e27
("cpufreq: ti-cpufreq: add support for omap34xx and omap36xx") Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -61,6 +61,9 @@ struct ti_cpufreq_soc_data {
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unsigned long efuse_shift;
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unsigned long rev_offset;
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bool multi_regulator;
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/* Backward compatibility hack: Might have missing syscon */
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#define TI_QUIRK_SYSCON_MAY_BE_MISSING 0x1
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u8 quirks;
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};
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struct ti_cpufreq_data {
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@ -182,6 +185,7 @@ static struct ti_cpufreq_soc_data omap34xx_soc_data = {
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.efuse_mask = BIT(3),
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.rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,
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.multi_regulator = false,
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.quirks = TI_QUIRK_SYSCON_MAY_BE_MISSING,
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};
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/*
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@ -209,6 +213,7 @@ static struct ti_cpufreq_soc_data omap36xx_soc_data = {
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.efuse_mask = BIT(9),
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.rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,
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.multi_regulator = true,
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.quirks = TI_QUIRK_SYSCON_MAY_BE_MISSING,
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};
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/*
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@ -223,6 +228,7 @@ static struct ti_cpufreq_soc_data am3517_soc_data = {
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.efuse_mask = 0,
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.rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,
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.multi_regulator = false,
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.quirks = TI_QUIRK_SYSCON_MAY_BE_MISSING,
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};
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static struct ti_cpufreq_soc_data am625_soc_data = {
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@ -250,7 +256,7 @@ static int ti_cpufreq_get_efuse(struct ti_cpufreq_data *opp_data,
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ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
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&efuse);
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if (ret == -EIO) {
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if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) {
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/* not a syscon register! */
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void __iomem *regs = ioremap(OMAP3_SYSCON_BASE +
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opp_data->soc_data->efuse_offset, 4);
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@ -291,7 +297,7 @@ static int ti_cpufreq_get_rev(struct ti_cpufreq_data *opp_data,
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ret = regmap_read(opp_data->syscon, opp_data->soc_data->rev_offset,
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&revision);
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if (ret == -EIO) {
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if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) {
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/* not a syscon register! */
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void __iomem *regs = ioremap(OMAP3_SYSCON_BASE +
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opp_data->soc_data->rev_offset, 4);
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