clk: socfpga: Remove check for "reg" property in socfpga_clk_init
The function socfpga_clk_init() can support clocks that do not have a divider register, but a fixed-divider that can be read from DTS. Therefore, the "reg" property is not a failing condition for socfpga_clk_init(). Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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@ -121,9 +121,7 @@ static __init struct clk *socfpga_clk_init(struct device_node *node,
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int rc;
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u32 fixed_div;
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rc = of_property_read_u32(node, "reg", ®);
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if (WARN_ON(rc))
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return NULL;
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of_property_read_u32(node, "reg", ®);
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socfpga_clk = kzalloc(sizeof(*socfpga_clk), GFP_KERNEL);
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if (WARN_ON(!socfpga_clk))
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