NXP LPC32xx ARM SoC device tree updates for v4.10
This includes a single functional change: * set default parent clock for PWM1 & PWM2. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.14 (GNU/Linux) iQIcBAABAgAGBQJYIcwQAAoJEJw94nR8/maC8t8QALZZmPEUuT6EUTGOP/3pZcws GrXqajDjK4U3ot0cJkmmQ07VVNYilz1zpl2DiRmSKepSyhrG64dP9G5thYBamPom nbkzlh3U02rjjyEgvidzbd+RisAMU5JJzIUAXROaghmhoC+SF87xFnttEU4PCRTg iqLNJfp/6FmnRH1kccT4KwzAQhNjzcQYxqc1FY8DekRl1etHZLSHdqc5I6j2a4qO BNKSEbv+xSbWqu0pMm5NFSwqkxTgSW7CgCOiezhHd2x3sLpKztXrZ0Y9S2Sis1rC VfTEQ/FBhCvnyUF1B/Qjmz9iOM3WMrQyHBE5y5rqoVS4rf9E/8BDk0mSLmq7Keeu ABZzlo6qa8wez1iAXhcHww6WDT4X3wRxxerZELADhU5orubch7R5hWJzL3wUp5N0 Zsxs5nhJjCAIPx5rI8vVz12EFu1XMpbc8cGX1Ah6nD5eVLE3YiMjQ+w8cJ+LI5bU YTx4Co0CuyJItp2GUOzeXzTBzN/0vz1TZN4csLd5r6OVfSFXW0tG9CwYrnT8R1mA E4DISdwWbbn3aAN/19g2Z0PwQzAl8QlQb2VWz16zzs4Ob0vl+jjU5PD70br17XiS 8CPKci0POBwRpx9K9j/uny5SWfmBpldvtlvicHCtmSeniuKkewtQhjJOZwgVCygQ 2dVGfgpXVYY1DjLNvLtf =9l30 -----END PGP SIGNATURE----- Merge tag 'lpc32xx-dt-v4.10' of https://github.com/sylemieux/linux-lpc32xx into next/dt NXP LPC32xx ARM SoC device tree updates for v4.10 This includes a single functional change: * set default parent clock for PWM1 & PWM2. * tag 'lpc32xx-dt-v4.10' of https://github.com/sylemieux/linux-lpc32xx: ARM: dts: lpc32xx: set default parent clock for pwm1 & pwm2 Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
4ce410a2bf
|
@ -479,6 +479,8 @@
|
|||
compatible = "nxp,lpc3220-pwm";
|
||||
reg = <0x4005C000 0x4>;
|
||||
clocks = <&clk LPC32XX_CLK_PWM1>;
|
||||
assigned-clocks = <&clk LPC32XX_CLK_PWM1>;
|
||||
assigned-clock-parents = <&clk LPC32XX_CLK_PERIPH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -486,6 +488,8 @@
|
|||
compatible = "nxp,lpc3220-pwm";
|
||||
reg = <0x4005C004 0x4>;
|
||||
clocks = <&clk LPC32XX_CLK_PWM2>;
|
||||
assigned-clocks = <&clk LPC32XX_CLK_PWM2>;
|
||||
assigned-clock-parents = <&clk LPC32XX_CLK_PERIPH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
Loading…
Reference in New Issue