sfc: Add some missing bits to register self-test masks
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
c91f48d61c
commit
4cddca5484
|
@ -1008,7 +1008,7 @@ static int falcon_test_nvram(struct efx_nic *efx)
|
|||
|
||||
static const struct efx_nic_register_test falcon_b0_register_tests[] = {
|
||||
{ FR_AZ_ADR_REGION,
|
||||
EFX_OWORD32(0x0001FFFF, 0x0001FFFF, 0x0001FFFF, 0x0001FFFF) },
|
||||
EFX_OWORD32(0x0003FFFF, 0x0003FFFF, 0x0003FFFF, 0x0003FFFF) },
|
||||
{ FR_AZ_RX_CFG,
|
||||
EFX_OWORD32(0xFFFFFFFE, 0x00017FFF, 0x00000000, 0x00000000) },
|
||||
{ FR_AZ_TX_CFG,
|
||||
|
|
|
@ -134,7 +134,7 @@ void siena_remove_port(struct efx_nic *efx)
|
|||
|
||||
static const struct efx_nic_register_test siena_register_tests[] = {
|
||||
{ FR_AZ_ADR_REGION,
|
||||
EFX_OWORD32(0x0001FFFF, 0x0001FFFF, 0x0001FFFF, 0x0001FFFF) },
|
||||
EFX_OWORD32(0x0003FFFF, 0x0003FFFF, 0x0003FFFF, 0x0003FFFF) },
|
||||
{ FR_CZ_USR_EV_CFG,
|
||||
EFX_OWORD32(0x000103FF, 0x00000000, 0x00000000, 0x00000000) },
|
||||
{ FR_AZ_RX_CFG,
|
||||
|
|
Loading…
Reference in New Issue