mvebu dt64 for 5.3 (part 1)
For Armada 7K/8K: - enable AP806 thermal throttling with CPUfreq - add missing #interrupt-cells property allowing configuring interrupt for GPIO On Armada 8040 based board: - Fix PCI memory window on Mcbin board - Set SFP power limit on clearfog GT board - Disable AP I2C on Armada-8040-DB On Armada 3720 based board espressobin correct the SPI node used for NOR flash On Armada 7040 DB board add USB current regulators -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCXQy4uwAKCRALBhiOFHI7 1dW6AJ9EYqnK7TQxYcxXl/gy8E5zaTH8igCeKGKpjV0P2sUv66nC3pmdipvMP68= =KCf7 -----END PGP SIGNATURE----- Merge tag 'mvebu-dt64-5.3-1' of git://git.infradead.org/linux-mvebu into arm/dt mvebu dt64 for 5.3 (part 1) For Armada 7K/8K: - enable AP806 thermal throttling with CPUfreq - add missing #interrupt-cells property allowing configuring interrupt for GPIO On Armada 8040 based board: - Fix PCI memory window on Mcbin board - Set SFP power limit on clearfog GT board - Disable AP I2C on Armada-8040-DB On Armada 3720 based board espressobin correct the SPI node used for NOR flash On Armada 7040 DB board add USB current regulators * tag 'mvebu-dt64-5.3-1' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: add missing #interrupt-cells property arm64: dts: marvell: armada-7040-db: Add USB current regulators arm64: dts: armada-3720-espressobin: correct spi node arm64: dts: marvell: Disable AP I2C on Armada-8040-DB arm64: dts: marvell: Enable AP806 thermal throttling with CPUfreq arm64: dts: marvell: Change core numbering in AP806 thermal-node arm64: dts: marvell: clearfog-gt-8k: set SFP power limit arm64: dts: marvell: mcbin: enlarge PCI memory window Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
4cb0f05d37
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@ -95,25 +95,9 @@
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flash@0 {
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reg = <0>;
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compatible = "winbond,w25q32dw", "jedec,spi-flash";
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compatible = "jedec,spi-nor";
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spi-max-frequency = <104000000>;
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "uboot";
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reg = <0 0x180000>;
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};
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partition@180000 {
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label = "ubootenv";
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reg = <0x180000 0x10000>;
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};
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};
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};
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};
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@ -28,6 +28,32 @@
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ethernet2 = &cp0_eth2;
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};
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cp0_exp_usb3_0_current_regulator: gpio-regulator {
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compatible = "regulator-gpio";
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regulator-name = "cp0-usb3-0-current-regulator";
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regulator-type = "current";
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regulator-min-microamp = <500000>;
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regulator-max-microamp = <900000>;
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gpios = <&expander0 4 GPIO_ACTIVE_HIGH>;
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states = <500000 0x0
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900000 0x1>;
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enable-active-high;
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gpios-states = <0>;
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};
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cp0_exp_usb3_1_current_regulator: gpio-regulator {
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compatible = "regulator-gpio";
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regulator-name = "cp0-usb3-1-current-regulator";
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regulator-type = "current";
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regulator-min-microamp = <500000>;
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regulator-max-microamp = <900000>;
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gpios = <&expander0 5 GPIO_ACTIVE_HIGH>;
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states = <500000 0x0
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900000 0x1>;
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enable-active-high;
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gpios-states = <0>;
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};
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cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb3h0-vbus";
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@ -35,6 +61,7 @@
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
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vin-supply = <&cp0_exp_usb3_0_current_regulator>;
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};
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cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {
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@ -44,6 +71,7 @@
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
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vin-supply = <&cp0_exp_usb3_1_current_regulator>;
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};
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cp0_usb3_0_phy: cp0-usb3-0-phy {
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@ -63,6 +63,7 @@
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tx-disable-gpio = <&cp1_gpio1 29 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_sfp_present_pins &cp1_sfp_tx_disable_pins>;
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maximum-power-milliwatt = <2000>;
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};
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leds {
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@ -27,6 +27,8 @@
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ethernet1 = &cp0_eth2;
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ethernet2 = &cp1_eth0;
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ethernet3 = &cp1_eth1;
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i2c1 = &cp0_i2c0;
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i2c2 = &cp1_i2c0;
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};
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cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
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@ -72,11 +74,6 @@
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};
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <100000>;
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};
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&spi0 {
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status = "okay";
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@ -184,6 +184,8 @@
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num-lanes = <4>;
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num-viewport = <8>;
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reset-gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
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ranges = <0x81000000 0x0 0xf9010000 0x0 0xf9010000 0x0 0x10000
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0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000>;
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status = "okay";
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};
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@ -20,12 +20,14 @@
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compatible = "arm,cortex-a72";
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reg = <0x000>;
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enable-method = "psci";
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#cooling-cells = <2>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a72";
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reg = <0x001>;
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enable-method = "psci";
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#cooling-cells = <2>;
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};
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};
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};
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@ -20,24 +20,29 @@
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compatible = "arm,cortex-a72";
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reg = <0x000>;
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enable-method = "psci";
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#cooling-cells = <2>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a72";
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reg = <0x001>;
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enable-method = "psci";
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#cooling-cells = <2>;
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};
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cpu2: cpu@100 {
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device_type = "cpu";
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compatible = "arm,cortex-a72";
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reg = <0x100>;
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enable-method = "psci";
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#cooling-cells = <2>;
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};
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cpu3: cpu@101 {
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device_type = "cpu";
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compatible = "arm,cortex-a72";
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reg = <0x101>;
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enable-method = "psci";
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#cooling-cells = <2>;
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};
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};
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};
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@ -297,8 +297,6 @@
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*
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* Only one thermal zone per AP/CP may trigger interrupts at a time, the
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* first one that will have a critical trip point will be chosen.
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*
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* The cooling maps are always empty as there are no cooling devices.
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*/
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thermal-zones {
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ap_thermal_ic: ap-thermal-ic {
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@ -318,44 +316,136 @@
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cooling-maps { };
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};
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ap_thermal_cpu1: ap-thermal-cpu1 {
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ap_thermal_cpu0: ap-thermal-cpu0 {
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polling-delay-passive = <1000>;
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polling-delay = <1000>;
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thermal-sensors = <&ap_thermal 1>;
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trips { };
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cooling-maps { };
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trips {
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cpu0_hot: cpu0-hot {
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temperature = <85000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu0_emerg: cpu0-emerg {
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temperature = <95000>;
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hysteresis = <2000>;
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type = "passive";
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};
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};
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cooling-maps {
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map0_hot: map0-hot {
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trip = <&cpu0_hot>;
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cooling-device = <&cpu0 1 2>,
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<&cpu1 1 2>;
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};
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map0_emerg: map0-ermerg {
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trip = <&cpu0_emerg>;
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cooling-device = <&cpu0 3 3>,
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<&cpu1 3 3>;
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};
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};
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};
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ap_thermal_cpu1: ap-thermal-cpu1 {
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polling-delay-passive = <1000>;
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polling-delay = <1000>;
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thermal-sensors = <&ap_thermal 2>;
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trips {
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cpu1_hot: cpu1-hot {
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temperature = <85000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu1_emerg: cpu1-emerg {
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temperature = <95000>;
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hysteresis = <2000>;
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type = "passive";
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};
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};
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cooling-maps {
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map1_hot: map1-hot {
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trip = <&cpu1_hot>;
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cooling-device = <&cpu0 1 2>,
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<&cpu1 1 2>;
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};
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map1_emerg: map1-emerg {
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trip = <&cpu1_emerg>;
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cooling-device = <&cpu0 3 3>,
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<&cpu1 3 3>;
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};
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};
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};
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ap_thermal_cpu2: ap-thermal-cpu2 {
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polling-delay-passive = <1000>;
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polling-delay = <1000>;
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thermal-sensors = <&ap_thermal 2>;
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thermal-sensors = <&ap_thermal 3>;
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trips { };
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cooling-maps { };
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trips {
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cpu2_hot: cpu2-hot {
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temperature = <85000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu2_emerg: cpu2-emerg {
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temperature = <95000>;
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hysteresis = <2000>;
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type = "passive";
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};
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};
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cooling-maps {
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map2_hot: map2-hot {
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trip = <&cpu2_hot>;
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cooling-device = <&cpu2 1 2>,
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<&cpu3 1 2>;
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};
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map2_emerg: map2-emerg {
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trip = <&cpu2_emerg>;
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cooling-device = <&cpu2 3 3>,
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<&cpu3 3 3>;
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};
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};
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};
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ap_thermal_cpu3: ap-thermal-cpu3 {
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polling-delay-passive = <1000>;
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polling-delay = <1000>;
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thermal-sensors = <&ap_thermal 3>;
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trips { };
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cooling-maps { };
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};
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ap_thermal_cpu4: ap-thermal-cpu4 {
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polling-delay-passive = <1000>;
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polling-delay = <1000>;
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thermal-sensors = <&ap_thermal 4>;
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trips { };
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cooling-maps { };
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trips {
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cpu3_hot: cpu3-hot {
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temperature = <85000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu3_emerg: cpu3-emerg {
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temperature = <95000>;
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hysteresis = <2000>;
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type = "passive";
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};
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};
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cooling-maps {
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map3_hot: map3-bhot {
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trip = <&cpu3_hot>;
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cooling-device = <&cpu2 1 2>,
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<&cpu3 1 2>;
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};
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map3_emerg: map3-emerg {
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trip = <&cpu3_emerg>;
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cooling-device = <&cpu2 3 3>,
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<&cpu3 3 3>;
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};
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};
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};
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};
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};
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@ -238,6 +238,7 @@
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<85 IRQ_TYPE_LEVEL_HIGH>,
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<84 IRQ_TYPE_LEVEL_HIGH>,
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<83 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <2>;
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status = "disabled";
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};
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<81 IRQ_TYPE_LEVEL_HIGH>,
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<80 IRQ_TYPE_LEVEL_HIGH>,
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<79 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <2>;
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status = "disabled";
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};
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};
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