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drm/amd/powerplay: enable voltage control by default for dgpu. 

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rex Zhu 2016-11-02 16:03:46 +08:00 committed by Alex Deucher
parent ce4286bfa7
commit 4c696ecf4f
1 changed files with 3 additions and 6 deletions
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9
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
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@ -80,20 +80,17 @@ int hwmgr_init(struct amd_pp_init *pp_init, struct pp_instance *handle)
switch (hwmgr->chip_id) { switch (hwmgr->chip_id) {
case CHIP_TOPAZ: case CHIP_TOPAZ:
topaz_set_asic_special_caps(hwmgr); topaz_set_asic_special_caps(hwmgr);
hwmgr->feature_mask &= ~(PP_SMC_VOLTAGE_CONTROL_MASK | hwmgr->feature_mask &= ~ (PP_VBI_TIME_SUPPORT_MASK |
PP_VBI_TIME_SUPPORT_MASK |
PP_ENABLE_GFX_CG_THRU_SMU); PP_ENABLE_GFX_CG_THRU_SMU);
hwmgr->pp_table_version = PP_TABLE_V0; hwmgr->pp_table_version = PP_TABLE_V0;
break; break;
case CHIP_TONGA: case CHIP_TONGA:
tonga_set_asic_special_caps(hwmgr); tonga_set_asic_special_caps(hwmgr);
hwmgr->feature_mask &= ~(PP_SMC_VOLTAGE_CONTROL_MASK | hwmgr->feature_mask &= ~PP_VBI_TIME_SUPPORT_MASK;
PP_VBI_TIME_SUPPORT_MASK);
break; break;
case CHIP_FIJI: case CHIP_FIJI:
fiji_set_asic_special_caps(hwmgr); fiji_set_asic_special_caps(hwmgr);
hwmgr->feature_mask &= ~(PP_SMC_VOLTAGE_CONTROL_MASK | hwmgr->feature_mask &= ~ (PP_VBI_TIME_SUPPORT_MASK |
PP_VBI_TIME_SUPPORT_MASK |
PP_ENABLE_GFX_CG_THRU_SMU); PP_ENABLE_GFX_CG_THRU_SMU);
break; break;
case CHIP_POLARIS11: case CHIP_POLARIS11: