drm/amdgpu: cleanup user fence handling in the CS
Don't keep that around twice. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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50838c8cc4
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@ -1232,7 +1232,6 @@ struct amdgpu_cs_parser {
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uint64_t bytes_moved;
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/* user fence */
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struct amdgpu_user_fence uf;
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struct amdgpu_bo_list_entry uf_entry;
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};
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@ -87,6 +87,7 @@ int amdgpu_cs_get_ring(struct amdgpu_device *adev, u32 ip_type,
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}
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static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p,
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struct amdgpu_user_fence *uf,
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struct drm_amdgpu_cs_chunk_fence *fence_data)
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{
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struct drm_gem_object *gobj;
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@ -98,15 +99,15 @@ static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p,
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if (gobj == NULL)
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return -EINVAL;
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p->uf.bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
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p->uf.offset = fence_data->offset;
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uf->bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
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uf->offset = fence_data->offset;
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if (amdgpu_ttm_tt_get_usermm(p->uf.bo->tbo.ttm)) {
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if (amdgpu_ttm_tt_get_usermm(uf->bo->tbo.ttm)) {
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drm_gem_object_unreference_unlocked(gobj);
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return -EINVAL;
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}
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p->uf_entry.robj = amdgpu_bo_ref(p->uf.bo);
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p->uf_entry.robj = amdgpu_bo_ref(uf->bo);
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p->uf_entry.priority = 0;
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p->uf_entry.tv.bo = &p->uf_entry.robj->tbo;
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p->uf_entry.tv.shared = true;
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@ -117,10 +118,11 @@ static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p,
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int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
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{
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struct amdgpu_fpriv *fpriv = p->filp->driver_priv;
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union drm_amdgpu_cs *cs = data;
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uint64_t *chunk_array_user;
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uint64_t *chunk_array;
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struct amdgpu_fpriv *fpriv = p->filp->driver_priv;
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struct amdgpu_user_fence uf = {};
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unsigned size, num_ibs = 0;
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int i;
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int ret;
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@ -196,7 +198,7 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
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goto free_partial_kdata;
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}
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ret = amdgpu_cs_user_fence_chunk(p, (void *)p->chunks[i].kdata);
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ret = amdgpu_cs_user_fence_chunk(p, &uf, (void *)p->chunks[i].kdata);
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if (ret)
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goto free_partial_kdata;
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@ -215,6 +217,8 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
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if (ret)
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goto free_all_kdata;
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p->job->uf = uf;
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kfree(chunk_array);
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return 0;
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@ -353,7 +357,7 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
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INIT_LIST_HEAD(&duplicates);
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amdgpu_vm_get_pd_bo(&fpriv->vm, &p->validated, &p->vm_pd);
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if (p->uf.bo)
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if (p->job->uf.bo)
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list_add(&p->uf_entry.tv.head, &p->validated);
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if (need_mmap_lock)
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@ -472,7 +476,6 @@ static void amdgpu_cs_parser_fini(struct amdgpu_cs_parser *parser, int error, bo
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kfree(parser->chunks);
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if (parser->job)
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amdgpu_job_free(parser->job);
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amdgpu_bo_unref(&parser->uf.bo);
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amdgpu_bo_unref(&parser->uf_entry.robj);
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}
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@ -673,7 +676,7 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
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}
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}
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/* wrap the last IB with user fence */
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if (parser->uf.bo) {
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if (parser->job->uf.bo) {
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struct amdgpu_ib *ib = &parser->job->ibs[parser->job->num_ibs - 1];
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/* UVD & VCE fw doesn't support user fences */
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@ -681,7 +684,7 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
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ib->ring->type == AMDGPU_RING_TYPE_VCE)
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return -EINVAL;
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ib->user = &parser->uf;
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ib->user = &parser->job->uf;
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}
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return 0;
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@ -767,12 +770,6 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
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job->owner = p->filp;
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job->free_job = amdgpu_cs_free_job;
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if (job->ibs[job->num_ibs - 1].user) {
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job->uf = p->uf;
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job->ibs[job->num_ibs - 1].user = &job->uf;
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p->uf.bo = NULL;
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}
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fence = amd_sched_fence_create(job->base.s_entity, p->filp);
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if (!fence) {
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amdgpu_cs_free_job(job);
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