KVM: SVM: Detect X2APIC virtualization (x2AVIC) support
Add CPUID check for the x2APIC virtualization (x2AVIC) feature. If available, the SVM driver can support both AVIC and x2AVIC modes when load the kvm_amd driver with avic=1. The operating mode will be determined at runtime depending on the guest APIC mode. Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Reviewed-by: Pankaj Gupta <pankaj.gupta@amd.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Message-Id: <20220519102709.24125-4-suravee.suthikulpanit@amd.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -195,6 +195,9 @@ struct __attribute__ ((__packed__)) vmcb_control_area {
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#define AVIC_ENABLE_SHIFT 31
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#define AVIC_ENABLE_SHIFT 31
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#define AVIC_ENABLE_MASK (1 << AVIC_ENABLE_SHIFT)
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#define AVIC_ENABLE_MASK (1 << AVIC_ENABLE_SHIFT)
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#define X2APIC_MODE_SHIFT 30
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#define X2APIC_MODE_MASK (1 << X2APIC_MODE_SHIFT)
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#define LBR_CTL_ENABLE_MASK BIT_ULL(0)
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#define LBR_CTL_ENABLE_MASK BIT_ULL(0)
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#define VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK BIT_ULL(1)
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#define VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK BIT_ULL(1)
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@ -40,6 +40,9 @@
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#define AVIC_GATAG_TO_VMID(x) ((x >> AVIC_VCPU_ID_BITS) & AVIC_VM_ID_MASK)
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#define AVIC_GATAG_TO_VMID(x) ((x >> AVIC_VCPU_ID_BITS) & AVIC_VM_ID_MASK)
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#define AVIC_GATAG_TO_VCPUID(x) (x & AVIC_VCPU_ID_MASK)
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#define AVIC_GATAG_TO_VCPUID(x) (x & AVIC_VCPU_ID_MASK)
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static bool force_avic;
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module_param_unsafe(force_avic, bool, 0444);
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/* Note:
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/* Note:
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* This hash table is used to map VM_ID to a struct kvm_svm,
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* This hash table is used to map VM_ID to a struct kvm_svm,
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* when handling AMD IOMMU GALOG notification to schedule in
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* when handling AMD IOMMU GALOG notification to schedule in
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@ -50,6 +53,7 @@ static DEFINE_HASHTABLE(svm_vm_data_hash, SVM_VM_DATA_HASH_BITS);
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static u32 next_vm_id = 0;
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static u32 next_vm_id = 0;
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static bool next_vm_id_wrapped = 0;
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static bool next_vm_id_wrapped = 0;
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static DEFINE_SPINLOCK(svm_vm_data_hash_lock);
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static DEFINE_SPINLOCK(svm_vm_data_hash_lock);
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enum avic_modes avic_mode;
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/*
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/*
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* This is a wrapper of struct amd_iommu_ir_data.
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* This is a wrapper of struct amd_iommu_ir_data.
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@ -1058,3 +1062,44 @@ void avic_vcpu_unblocking(struct kvm_vcpu *vcpu)
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avic_vcpu_load(vcpu, vcpu->cpu);
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avic_vcpu_load(vcpu, vcpu->cpu);
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}
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}
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/*
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* Note:
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* - The module param avic enable both xAPIC and x2APIC mode.
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* - Hypervisor can support both xAVIC and x2AVIC in the same guest.
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* - The mode can be switched at run-time.
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*/
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bool avic_hardware_setup(struct kvm_x86_ops *x86_ops)
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{
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if (!npt_enabled)
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return false;
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if (boot_cpu_has(X86_FEATURE_AVIC)) {
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avic_mode = AVIC_MODE_X1;
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pr_info("AVIC enabled\n");
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} else if (force_avic) {
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/*
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* Some older systems does not advertise AVIC support.
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* See Revision Guide for specific AMD processor for more detail.
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*/
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avic_mode = AVIC_MODE_X1;
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pr_warn("AVIC is not supported in CPUID but force enabled");
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pr_warn("Your system might crash and burn");
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}
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/* AVIC is a prerequisite for x2AVIC. */
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if (boot_cpu_has(X86_FEATURE_X2AVIC)) {
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if (avic_mode == AVIC_MODE_X1) {
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avic_mode = AVIC_MODE_X2;
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pr_info("x2AVIC enabled\n");
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} else {
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pr_warn(FW_BUG "Cannot support x2AVIC due to AVIC is disabled");
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pr_warn(FW_BUG "Try enable AVIC using force_avic option");
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}
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}
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if (avic_mode != AVIC_MODE_NONE)
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amd_iommu_register_ga_log_notifier(&avic_ga_log_notifier);
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return !!avic_mode;
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}
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@ -188,9 +188,6 @@ module_param(tsc_scaling, int, 0444);
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static bool avic;
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static bool avic;
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module_param(avic, bool, 0444);
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module_param(avic, bool, 0444);
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static bool force_avic;
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module_param_unsafe(force_avic, bool, 0444);
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bool __read_mostly dump_invalid_vmcb;
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bool __read_mostly dump_invalid_vmcb;
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module_param(dump_invalid_vmcb, bool, 0644);
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module_param(dump_invalid_vmcb, bool, 0644);
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@ -5016,17 +5013,9 @@ static __init int svm_hardware_setup(void)
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nrips = false;
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nrips = false;
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}
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}
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enable_apicv = avic = avic && npt_enabled && (boot_cpu_has(X86_FEATURE_AVIC) || force_avic);
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enable_apicv = avic = avic && avic_hardware_setup(&svm_x86_ops);
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if (enable_apicv) {
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if (!enable_apicv) {
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if (!boot_cpu_has(X86_FEATURE_AVIC)) {
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pr_warn("AVIC is not supported in CPUID but force enabled");
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pr_warn("Your system might crash and burn");
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} else
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pr_info("AVIC enabled\n");
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amd_iommu_register_ga_log_notifier(&avic_ga_log_notifier);
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} else {
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svm_x86_ops.vcpu_blocking = NULL;
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svm_x86_ops.vcpu_blocking = NULL;
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svm_x86_ops.vcpu_unblocking = NULL;
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svm_x86_ops.vcpu_unblocking = NULL;
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svm_x86_ops.vcpu_get_apicv_inhibit_reasons = NULL;
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svm_x86_ops.vcpu_get_apicv_inhibit_reasons = NULL;
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@ -36,6 +36,14 @@ extern bool npt_enabled;
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extern int vgif;
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extern int vgif;
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extern bool intercept_smi;
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extern bool intercept_smi;
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enum avic_modes {
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AVIC_MODE_NONE = 0,
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AVIC_MODE_X1,
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AVIC_MODE_X2,
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};
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extern enum avic_modes avic_mode;
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/*
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/*
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* Clean bits in VMCB.
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* Clean bits in VMCB.
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* VMCB_ALL_CLEAN_MASK might also need to
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* VMCB_ALL_CLEAN_MASK might also need to
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@ -607,6 +615,7 @@ extern struct kvm_x86_nested_ops svm_nested_ops;
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/* avic.c */
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/* avic.c */
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bool avic_hardware_setup(struct kvm_x86_ops *ops);
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int avic_ga_log_notifier(u32 ga_tag);
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int avic_ga_log_notifier(u32 ga_tag);
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void avic_vm_destroy(struct kvm *kvm);
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void avic_vm_destroy(struct kvm *kvm);
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int avic_vm_init(struct kvm *kvm);
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int avic_vm_init(struct kvm *kvm);
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