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ARM: dts: qcom: sdx55: Add QPIC NAND support 

Add qpic_nand node to support QPIC NAND controller on SDX55 platform.
Since there is no "aon" clock in SDX55, a dummy clock is provided.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-11-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Manivannan Sadhasivam 2021-01-06 18:23:14 +05:30 committed by Bjorn Andersson
parent 2470941806
commit 4bd7bfb456
1 changed files with 22 additions and 0 deletions
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22
arch/arm/boot/dts/qcom-sdx55.dtsi
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@ -35,6 +35,12 @@
#clock-cells = <0>;
clock-frequency = <32000>;
};
nand_clk_dummy: nand-clk-dummy {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32000>;
};
};
cpus {
@ -149,6 +155,22 @@
status = "disabled";
};
qpic_nand: nand@1b30000 {
compatible = "qcom,sdx55-nand";
reg = <0x01b30000 0x10000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&rpmhcc RPMH_QPIC_CLK>,
<&nand_clk_dummy>;
clock-names = "core", "aon";
dmas = <&qpic_bam 0>,
<&qpic_bam 1>,
<&qpic_bam 2>;
dma-names = "tx", "rx", "cmd";
status = "disabled";
};
tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0x01f40000 0x40000>;