From 4b906e58a1f0a29ce1da4ed832cc6f17e5889772 Mon Sep 17 00:00:00 2001 From: Sutharsan Ramamoorthy Date: Tue, 1 Feb 2011 22:45:04 -0800 Subject: [PATCH] Staging: Westbridge: added ioremap_nocache instead of phys_to_virt This patch removes phys_to_virt() and adds ioremap_nocache() for memory mapping the GPMC registers. Signed-off-by: Sutharsan Ramamoorthy Signed-off-by: Greg Kroah-Hartman --- .../astoria/arch/arm/mach-omap2/cyashalomap_kernel.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c b/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c index ad0c61db9937..ea9b733c3926 100644 --- a/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c +++ b/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c @@ -347,11 +347,8 @@ static int cy_as_hal_gpmc_init(void) u32 tmp32; int err; struct gpmc_timings timings; - /* - * get GPMC i/o registers base(already been i/o mapped - * in kernel, no need for separate i/o remap) - */ - gpmc_base = phys_to_virt(OMAP34XX_GPMC_BASE); + + gpmc_base = (u32)ioremap_nocache(OMAP34XX_GPMC_BASE, BLKSZ_4K); DBGPRN(KERN_INFO "kernel has gpmc_base=%x , val@ the base=%x", gpmc_base, __raw_readl(gpmc_base) );