drm/i915/gvt: vGPU schedule policy framework
This patch introduces a vGPU schedule policy framework, with a timer based schedule policy module for now Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
This commit is contained in:
Zhi Wang
Zhenyu Wang
parent
e473405783
commit
4b63960ebd
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@ -1,7 +1,7 @@
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GVT_DIR := gvt
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GVT_SOURCE := gvt.o aperture_gm.o handlers.o vgpu.o trace_points.o firmware.o \
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interrupt.o gtt.o cfg_space.o opregion.o mmio.o display.o edid.o \
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execlist.o scheduler.o
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execlist.o scheduler.o sched_policy.o
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ccflags-y += -I$(src) -I$(src)/$(GVT_DIR) -Wall
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i915-y += $(addprefix $(GVT_DIR)/, $(GVT_SOURCE))
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@ -177,6 +177,7 @@ void intel_gvt_clean_device(struct drm_i915_private *dev_priv)
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return;
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clean_service_thread(gvt);
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intel_gvt_clean_sched_policy(gvt);
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intel_gvt_clean_workload_scheduler(gvt);
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intel_gvt_clean_opregion(gvt);
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intel_gvt_clean_gtt(gvt);
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@ -244,14 +245,20 @@ int intel_gvt_init_device(struct drm_i915_private *dev_priv)
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if (ret)
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goto out_clean_opregion;
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ret = init_service_thread(gvt);
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ret = intel_gvt_init_sched_policy(gvt);
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if (ret)
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goto out_clean_workload_scheduler;
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ret = init_service_thread(gvt);
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if (ret)
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goto out_clean_sched_policy;
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gvt_dbg_core("gvt device creation is done\n");
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gvt->initialized = true;
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return 0;
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out_clean_sched_policy:
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intel_gvt_clean_sched_policy(gvt);
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out_clean_workload_scheduler:
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intel_gvt_clean_workload_scheduler(gvt);
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out_clean_opregion:
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@ -43,6 +43,7 @@
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#include "edid.h"
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#include "execlist.h"
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#include "scheduler.h"
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#include "sched_policy.h"
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#define GVT_MAX_VGPU 8
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@ -139,6 +140,7 @@ struct intel_vgpu {
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unsigned long handle; /* vGPU handle used by hypervisor MPT modules */
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bool active;
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bool resetting;
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void *sched_data;
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struct intel_vgpu_fence fence;
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struct intel_vgpu_gm gm;
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@ -235,6 +235,7 @@ static int handle_device_reset(struct intel_vgpu *vgpu, unsigned int offset,
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vgpu->resetting = true;
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intel_vgpu_stop_schedule(vgpu);
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if (scheduler->current_vgpu == vgpu) {
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mutex_unlock(&vgpu->gvt->lock);
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intel_gvt_wait_vgpu_idle(vgpu);
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@ -1317,6 +1318,28 @@ static int elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
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return 0;
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}
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static int ring_mode_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
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void *p_data, unsigned int bytes)
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{
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u32 data = *(u32 *)p_data;
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int ring_id = render_mmio_to_ring_id(vgpu->gvt, offset);
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bool enable_execlist;
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write_vreg(vgpu, offset, p_data, bytes);
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if ((data & _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE))
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|| (data & _MASKED_BIT_DISABLE(GFX_RUN_LIST_ENABLE))) {
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enable_execlist = !!(data & GFX_RUN_LIST_ENABLE);
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gvt_dbg_core("EXECLIST %s on ring %d\n",
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(enable_execlist ? "enabling" : "disabling"),
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ring_id);
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if (enable_execlist)
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intel_vgpu_start_schedule(vgpu);
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}
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return 0;
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}
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#define MMIO_F(reg, s, f, am, rm, d, r, w) do { \
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ret = new_mmio_info(gvt, INTEL_GVT_MMIO_OFFSET(reg), \
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f, s, am, rm, d, r, w); \
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@ -1398,7 +1421,7 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)
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/* RING MODE */
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#define RING_REG(base) (base + 0x29c)
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MMIO_RING_DFH(RING_REG, D_ALL, F_MODE_MASK, NULL, NULL);
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MMIO_RING_DFH(RING_REG, D_ALL, F_MODE_MASK, NULL, ring_mode_mmio_write);
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#undef RING_REG
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MMIO_RING_DFH(RING_MI_MODE, D_ALL, F_MODE_MASK, NULL, NULL);
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@ -2213,7 +2236,7 @@ static int init_broadwell_mmio_info(struct intel_gvt *gvt)
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MMIO_D(RING_CTL(GEN8_BSD2_RING_BASE), D_BDW_PLUS);
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MMIO_D(RING_ACTHD(GEN8_BSD2_RING_BASE), D_BDW_PLUS);
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MMIO_D(RING_ACTHD_UDW(GEN8_BSD2_RING_BASE), D_BDW_PLUS);
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MMIO_DFH(0x1c29c, D_BDW_PLUS, F_MODE_MASK, NULL, NULL);
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MMIO_DFH(0x1c29c, D_BDW_PLUS, F_MODE_MASK, NULL, ring_mode_mmio_write);
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MMIO_DFH(RING_MI_MODE(GEN8_BSD2_RING_BASE), D_BDW_PLUS, F_MODE_MASK,
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NULL, NULL);
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MMIO_DFH(RING_INSTPM(GEN8_BSD2_RING_BASE), D_BDW_PLUS, F_MODE_MASK,
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@ -0,0 +1,291 @@
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/*
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* Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Anhua Xu
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* Kevin Tian <kevin.tian@intel.com>
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*
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* Contributors:
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* Min He <min.he@intel.com>
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* Bing Niu <bing.niu@intel.com>
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* Zhi Wang <zhi.a.wang@intel.com>
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*
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*/
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#include "i915_drv.h"
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static bool vgpu_has_pending_workload(struct intel_vgpu *vgpu)
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{
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struct intel_vgpu_execlist *execlist;
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int i;
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for (i = 0; i < I915_NUM_ENGINES; i++) {
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execlist = &vgpu->execlist[i];
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if (!list_empty(workload_q_head(vgpu, i)))
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return true;
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}
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return false;
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}
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static void try_to_schedule_next_vgpu(struct intel_gvt *gvt)
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{
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struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
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int i;
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/* no target to schedule */
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if (!scheduler->next_vgpu)
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return;
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gvt_dbg_sched("try to schedule next vgpu %d\n",
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scheduler->next_vgpu->id);
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/*
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* after the flag is set, workload dispatch thread will
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* stop dispatching workload for current vgpu
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*/
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scheduler->need_reschedule = true;
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/* still have uncompleted workload? */
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for (i = 0; i < I915_NUM_ENGINES; i++) {
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if (scheduler->current_workload[i]) {
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gvt_dbg_sched("still have running workload\n");
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return;
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}
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}
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gvt_dbg_sched("switch to next vgpu %d\n",
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scheduler->next_vgpu->id);
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/* switch current vgpu */
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scheduler->current_vgpu = scheduler->next_vgpu;
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scheduler->next_vgpu = NULL;
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scheduler->need_reschedule = false;
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/* wake up workload dispatch thread */
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for (i = 0; i < I915_NUM_ENGINES; i++)
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wake_up(&scheduler->waitq[i]);
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}
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struct tbs_vgpu_data {
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struct list_head list;
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struct intel_vgpu *vgpu;
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/* put some per-vgpu sched stats here */
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};
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struct tbs_sched_data {
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struct intel_gvt *gvt;
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struct delayed_work work;
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unsigned long period;
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struct list_head runq_head;
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};
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#define GVT_DEFAULT_TIME_SLICE (1 * HZ / 1000)
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static void tbs_sched_func(struct work_struct *work)
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{
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struct tbs_sched_data *sched_data = container_of(work,
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struct tbs_sched_data, work.work);
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struct tbs_vgpu_data *vgpu_data;
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struct intel_gvt *gvt = sched_data->gvt;
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struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
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struct intel_vgpu *vgpu = NULL;
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struct list_head *pos, *head;
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mutex_lock(&gvt->lock);
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/* no vgpu or has already had a target */
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if (list_empty(&sched_data->runq_head) || scheduler->next_vgpu)
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goto out;
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if (scheduler->current_vgpu) {
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vgpu_data = scheduler->current_vgpu->sched_data;
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head = &vgpu_data->list;
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} else {
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gvt_dbg_sched("no current vgpu search from q head\n");
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head = &sched_data->runq_head;
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}
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/* search a vgpu with pending workload */
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list_for_each(pos, head) {
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if (pos == &sched_data->runq_head)
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continue;
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vgpu_data = container_of(pos, struct tbs_vgpu_data, list);
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if (!vgpu_has_pending_workload(vgpu_data->vgpu))
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continue;
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vgpu = vgpu_data->vgpu;
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break;
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}
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if (vgpu) {
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scheduler->next_vgpu = vgpu;
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gvt_dbg_sched("pick next vgpu %d\n", vgpu->id);
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}
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out:
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if (scheduler->next_vgpu) {
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gvt_dbg_sched("try to schedule next vgpu %d\n",
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scheduler->next_vgpu->id);
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try_to_schedule_next_vgpu(gvt);
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}
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/*
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* still have vgpu on runq
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* or last schedule haven't finished due to running workload
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*/
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if (!list_empty(&sched_data->runq_head) || scheduler->next_vgpu)
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schedule_delayed_work(&sched_data->work, sched_data->period);
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mutex_unlock(&gvt->lock);
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}
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static int tbs_sched_init(struct intel_gvt *gvt)
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{
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struct intel_gvt_workload_scheduler *scheduler =
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&gvt->scheduler;
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struct tbs_sched_data *data;
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data = kzalloc(sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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INIT_LIST_HEAD(&data->runq_head);
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INIT_DELAYED_WORK(&data->work, tbs_sched_func);
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data->period = GVT_DEFAULT_TIME_SLICE;
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data->gvt = gvt;
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scheduler->sched_data = data;
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return 0;
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}
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static void tbs_sched_clean(struct intel_gvt *gvt)
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{
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struct intel_gvt_workload_scheduler *scheduler =
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&gvt->scheduler;
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struct tbs_sched_data *data = scheduler->sched_data;
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cancel_delayed_work(&data->work);
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kfree(data);
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scheduler->sched_data = NULL;
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}
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static int tbs_sched_init_vgpu(struct intel_vgpu *vgpu)
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{
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struct tbs_vgpu_data *data;
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data = kzalloc(sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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data->vgpu = vgpu;
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INIT_LIST_HEAD(&data->list);
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vgpu->sched_data = data;
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return 0;
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}
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static void tbs_sched_clean_vgpu(struct intel_vgpu *vgpu)
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{
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kfree(vgpu->sched_data);
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vgpu->sched_data = NULL;
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}
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static void tbs_sched_start_schedule(struct intel_vgpu *vgpu)
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{
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struct tbs_sched_data *sched_data = vgpu->gvt->scheduler.sched_data;
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struct tbs_vgpu_data *vgpu_data = vgpu->sched_data;
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if (!list_empty(&vgpu_data->list))
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return;
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list_add_tail(&vgpu_data->list, &sched_data->runq_head);
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schedule_delayed_work(&sched_data->work, sched_data->period);
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}
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static void tbs_sched_stop_schedule(struct intel_vgpu *vgpu)
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{
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struct tbs_vgpu_data *vgpu_data = vgpu->sched_data;
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list_del_init(&vgpu_data->list);
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}
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struct intel_gvt_sched_policy_ops tbs_schedule_ops = {
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.init = tbs_sched_init,
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.clean = tbs_sched_clean,
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.init_vgpu = tbs_sched_init_vgpu,
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.clean_vgpu = tbs_sched_clean_vgpu,
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.start_schedule = tbs_sched_start_schedule,
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.stop_schedule = tbs_sched_stop_schedule,
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};
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int intel_gvt_init_sched_policy(struct intel_gvt *gvt)
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{
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gvt->scheduler.sched_ops = &tbs_schedule_ops;
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return gvt->scheduler.sched_ops->init(gvt);
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}
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void intel_gvt_clean_sched_policy(struct intel_gvt *gvt)
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{
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gvt->scheduler.sched_ops->clean(gvt);
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}
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int intel_vgpu_init_sched_policy(struct intel_vgpu *vgpu)
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{
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return vgpu->gvt->scheduler.sched_ops->init_vgpu(vgpu);
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}
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void intel_vgpu_clean_sched_policy(struct intel_vgpu *vgpu)
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{
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vgpu->gvt->scheduler.sched_ops->clean_vgpu(vgpu);
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}
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void intel_vgpu_start_schedule(struct intel_vgpu *vgpu)
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{
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gvt_dbg_core("vgpu%d: start schedule\n", vgpu->id);
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vgpu->gvt->scheduler.sched_ops->start_schedule(vgpu);
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}
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void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu)
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{
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struct intel_gvt_workload_scheduler *scheduler =
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&vgpu->gvt->scheduler;
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gvt_dbg_core("vgpu%d: stop schedule\n", vgpu->id);
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scheduler->sched_ops->stop_schedule(vgpu);
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if (scheduler->next_vgpu == vgpu)
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scheduler->next_vgpu = NULL;
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if (scheduler->current_vgpu == vgpu) {
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/* stop workload dispatching */
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scheduler->need_reschedule = true;
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scheduler->current_vgpu = NULL;
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}
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}
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@ -0,0 +1,58 @@
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/*
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* Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
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*
|
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* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
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* SOFTWARE.
|
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*
|
||||
* Authors:
|
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* Anhua Xu
|
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* Kevin Tian <kevin.tian@intel.com>
|
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*
|
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* Contributors:
|
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* Min He <min.he@intel.com>
|
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* Bing Niu <bing.niu@intel.com>
|
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* Zhi Wang <zhi.a.wang@intel.com>
|
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*
|
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*/
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#ifndef __GVT_SCHED_POLICY__
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#define __GVT_SCHED_POLICY__
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struct intel_gvt_sched_policy_ops {
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int (*init)(struct intel_gvt *gvt);
|
||||
void (*clean)(struct intel_gvt *gvt);
|
||||
int (*init_vgpu)(struct intel_vgpu *vgpu);
|
||||
void (*clean_vgpu)(struct intel_vgpu *vgpu);
|
||||
void (*start_schedule)(struct intel_vgpu *vgpu);
|
||||
void (*stop_schedule)(struct intel_vgpu *vgpu);
|
||||
};
|
||||
|
||||
int intel_gvt_init_sched_policy(struct intel_gvt *gvt);
|
||||
|
||||
void intel_gvt_clean_sched_policy(struct intel_gvt *gvt);
|
||||
|
||||
int intel_vgpu_init_sched_policy(struct intel_vgpu *vgpu);
|
||||
|
||||
void intel_vgpu_clean_sched_policy(struct intel_vgpu *vgpu);
|
||||
|
||||
void intel_vgpu_start_schedule(struct intel_vgpu *vgpu);
|
||||
|
||||
void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu);
|
||||
|
||||
#endif
|
||||
|
|
@ -45,6 +45,9 @@ struct intel_gvt_workload_scheduler {
|
|||
wait_queue_head_t workload_complete_wq;
|
||||
struct task_struct *thread[I915_NUM_ENGINES];
|
||||
wait_queue_head_t waitq[I915_NUM_ENGINES];
|
||||
|
||||
void *sched_data;
|
||||
struct intel_gvt_sched_policy_ops *sched_ops;
|
||||
};
|
||||
|
||||
struct intel_vgpu_workload {
|
||||
|
|
|
|||
|
|
@ -146,6 +146,14 @@ void intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu)
|
|||
vgpu->active = false;
|
||||
idr_remove(&gvt->vgpu_idr, vgpu->id);
|
||||
|
||||
if (atomic_read(&vgpu->running_workload_num)) {
|
||||
mutex_unlock(&gvt->lock);
|
||||
intel_gvt_wait_vgpu_idle(vgpu);
|
||||
mutex_lock(&gvt->lock);
|
||||
}
|
||||
|
||||
intel_vgpu_stop_schedule(vgpu);
|
||||
intel_vgpu_clean_sched_policy(vgpu);
|
||||
intel_vgpu_clean_gvt_context(vgpu);
|
||||
intel_vgpu_clean_execlist(vgpu);
|
||||
intel_vgpu_clean_display(vgpu);
|
||||
|
|
@ -231,11 +239,17 @@ struct intel_vgpu *intel_gvt_create_vgpu(struct intel_gvt *gvt,
|
|||
if (ret)
|
||||
goto out_clean_execlist;
|
||||
|
||||
ret = intel_vgpu_init_sched_policy(vgpu);
|
||||
if (ret)
|
||||
goto out_clean_shadow_ctx;
|
||||
|
||||
vgpu->active = true;
|
||||
mutex_unlock(&gvt->lock);
|
||||
|
||||
return vgpu;
|
||||
|
||||
out_clean_shadow_ctx:
|
||||
intel_vgpu_clean_gvt_context(vgpu);
|
||||
out_clean_execlist:
|
||||
intel_vgpu_clean_execlist(vgpu);
|
||||
out_clean_display:
|
||||
|
|
|
|||
Loading…
Reference in New Issue