Merge branch 'msm-fixes-4.0' of git://people.freedesktop.org/~robclark/linux into drm-fixes
Fixup some fallout of the fallout of atomic dpms, few mdp5 cursor fixes, fix a leak in error path, and some fixes for kexec * 'msm-fixes-4.0' of git://people.freedesktop.org/~robclark/linux: drm/msm: kexec fixes drm/msm/mdp5: fix cursor blending drm/msm/mdp5: fix cursor ROI drm/msm/atomic: Don't leak atomic commit object when commit fails drm/msm/mdp5: Avoid flushing registers when CRTC is disabled drm/msm: update generated headers (add 6th lm.base entry) drm/msm/mdp5: fixup "drm/msm: fix fallout of atomic dpms changes"
This commit is contained in:
Dave Airlie
commit
4afb153477
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@ -32,7 +32,10 @@ static void mdp4_irq_error_handler(struct mdp_irq *irq, uint32_t irqstatus)
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void mdp4_irq_preinstall(struct msm_kms *kms)
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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mdp4_enable(mdp4_kms);
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mdp4_write(mdp4_kms, REG_MDP4_INTR_CLEAR, 0xffffffff);
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mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000);
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mdp4_disable(mdp4_kms);
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}
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int mdp4_irq_postinstall(struct msm_kms *kms)
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@ -53,7 +56,9 @@ int mdp4_irq_postinstall(struct msm_kms *kms)
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void mdp4_irq_uninstall(struct msm_kms *kms)
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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mdp4_enable(mdp4_kms);
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mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000);
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mdp4_disable(mdp4_kms);
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}
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irqreturn_t mdp4_irq(struct msm_kms *kms)
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@ -8,17 +8,9 @@ http://github.com/freedreno/envytools/
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git clone https://github.com/freedreno/envytools.git
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The rules-ng-ng source files this header was generated from are:
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- /home/robclark/src/freedreno/envytools/rnndb/msm.xml ( 676 bytes, from 2014-12-05 15:34:49)
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- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1453 bytes, from 2013-03-31 16:51:27)
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- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp4.xml ( 20908 bytes, from 2014-12-08 16:13:00)
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- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp_common.xml ( 2357 bytes, from 2014-12-08 16:13:00)
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- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp5.xml ( 27208 bytes, from 2015-01-13 23:56:11)
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- /home/robclark/src/freedreno/envytools/rnndb/dsi/dsi.xml ( 11712 bytes, from 2013-08-17 17:13:43)
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- /home/robclark/src/freedreno/envytools/rnndb/dsi/sfpb.xml ( 344 bytes, from 2013-08-11 19:26:32)
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- /home/robclark/src/freedreno/envytools/rnndb/dsi/mmss_cc.xml ( 1686 bytes, from 2014-10-31 16:48:57)
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- /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml ( 600 bytes, from 2013-07-05 19:21:12)
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- /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 26848 bytes, from 2015-01-13 23:55:57)
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- /home/robclark/src/freedreno/envytools/rnndb/edp/edp.xml ( 8253 bytes, from 2014-12-08 16:13:00)
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- /local/mnt2/workspace2/sviau/envytools/rnndb/mdp/mdp5.xml ( 27229 bytes, from 2015-02-10 17:00:41)
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- /local/mnt2/workspace2/sviau/envytools/rnndb/freedreno_copyright.xml ( 1453 bytes, from 2014-06-02 18:31:15)
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- /local/mnt2/workspace2/sviau/envytools/rnndb/mdp/mdp_common.xml ( 2357 bytes, from 2015-01-23 16:20:19)
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Copyright (C) 2013-2015 by the following authors:
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- Rob Clark <robdclark@gmail.com> (robclark)
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@ -910,6 +902,7 @@ static inline uint32_t __offset_LM(uint32_t idx)
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case 2: return (mdp5_cfg->lm.base[2]);
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case 3: return (mdp5_cfg->lm.base[3]);
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case 4: return (mdp5_cfg->lm.base[4]);
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case 5: return (mdp5_cfg->lm.base[5]);
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default: return INVALID_IDX(idx);
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}
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}
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@ -62,8 +62,8 @@ struct mdp5_crtc {
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/* current cursor being scanned out: */
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struct drm_gem_object *scanout_bo;
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uint32_t width;
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uint32_t height;
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uint32_t width, height;
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uint32_t x, y;
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} cursor;
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};
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#define to_mdp5_crtc(x) container_of(x, struct mdp5_crtc, base)
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@ -103,8 +103,8 @@ static void crtc_flush_all(struct drm_crtc *crtc)
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struct drm_plane *plane;
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uint32_t flush_mask = 0;
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/* we could have already released CTL in the disable path: */
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if (!mdp5_crtc->ctl)
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/* this should not happen: */
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if (WARN_ON(!mdp5_crtc->ctl))
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return;
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drm_atomic_crtc_for_each_plane(plane, crtc) {
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@ -143,6 +143,11 @@ static void complete_flip(struct drm_crtc *crtc, struct drm_file *file)
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drm_atomic_crtc_for_each_plane(plane, crtc) {
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mdp5_plane_complete_flip(plane);
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}
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if (mdp5_crtc->ctl && !crtc->state->enable) {
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mdp5_ctl_release(mdp5_crtc->ctl);
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mdp5_crtc->ctl = NULL;
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}
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}
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static void unref_cursor_worker(struct drm_flip_work *work, void *val)
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@ -386,14 +391,17 @@ static void mdp5_crtc_atomic_flush(struct drm_crtc *crtc)
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mdp5_crtc->event = crtc->state->event;
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spin_unlock_irqrestore(&dev->event_lock, flags);
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/*
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* If no CTL has been allocated in mdp5_crtc_atomic_check(),
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* it means we are trying to flush a CRTC whose state is disabled:
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* nothing else needs to be done.
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*/
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if (unlikely(!mdp5_crtc->ctl))
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return;
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blend_setup(crtc);
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crtc_flush_all(crtc);
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request_pending(crtc, PENDING_FLIP);
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if (mdp5_crtc->ctl && !crtc->state->enable) {
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mdp5_ctl_release(mdp5_crtc->ctl);
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mdp5_crtc->ctl = NULL;
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}
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}
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static int mdp5_crtc_set_property(struct drm_crtc *crtc,
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@ -403,6 +411,32 @@ static int mdp5_crtc_set_property(struct drm_crtc *crtc,
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return -EINVAL;
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}
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static void get_roi(struct drm_crtc *crtc, uint32_t *roi_w, uint32_t *roi_h)
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{
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struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
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uint32_t xres = crtc->mode.hdisplay;
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uint32_t yres = crtc->mode.vdisplay;
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/*
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* Cursor Region Of Interest (ROI) is a plane read from cursor
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* buffer to render. The ROI region is determined by the visibility of
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* the cursor point. In the default Cursor image the cursor point will
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* be at the top left of the cursor image, unless it is specified
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* otherwise using hotspot feature.
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*
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* If the cursor point reaches the right (xres - x < cursor.width) or
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* bottom (yres - y < cursor.height) boundary of the screen, then ROI
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* width and ROI height need to be evaluated to crop the cursor image
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* accordingly.
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* (xres-x) will be new cursor width when x > (xres - cursor.width)
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* (yres-y) will be new cursor height when y > (yres - cursor.height)
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*/
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*roi_w = min(mdp5_crtc->cursor.width, xres -
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mdp5_crtc->cursor.x);
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*roi_h = min(mdp5_crtc->cursor.height, yres -
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mdp5_crtc->cursor.y);
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}
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static int mdp5_crtc_cursor_set(struct drm_crtc *crtc,
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struct drm_file *file, uint32_t handle,
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uint32_t width, uint32_t height)
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@ -416,6 +450,7 @@ static int mdp5_crtc_cursor_set(struct drm_crtc *crtc,
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unsigned int depth;
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enum mdp5_cursor_alpha cur_alpha = CURSOR_ALPHA_PER_PIXEL;
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uint32_t flush_mask = mdp_ctl_flush_mask_cursor(0);
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uint32_t roi_w, roi_h;
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unsigned long flags;
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if ((width > CURSOR_WIDTH) || (height > CURSOR_HEIGHT)) {
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@ -446,6 +481,12 @@ static int mdp5_crtc_cursor_set(struct drm_crtc *crtc,
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spin_lock_irqsave(&mdp5_crtc->cursor.lock, flags);
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old_bo = mdp5_crtc->cursor.scanout_bo;
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mdp5_crtc->cursor.scanout_bo = cursor_bo;
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mdp5_crtc->cursor.width = width;
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mdp5_crtc->cursor.height = height;
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get_roi(crtc, &roi_w, &roi_h);
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mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_STRIDE(lm), stride);
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mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_FORMAT(lm),
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MDP5_LM_CURSOR_FORMAT_FORMAT(CURSOR_FMT_ARGB8888));
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@ -453,19 +494,14 @@ static int mdp5_crtc_cursor_set(struct drm_crtc *crtc,
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MDP5_LM_CURSOR_IMG_SIZE_SRC_H(height) |
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MDP5_LM_CURSOR_IMG_SIZE_SRC_W(width));
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mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_SIZE(lm),
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MDP5_LM_CURSOR_SIZE_ROI_H(height) |
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MDP5_LM_CURSOR_SIZE_ROI_W(width));
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MDP5_LM_CURSOR_SIZE_ROI_H(roi_h) |
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MDP5_LM_CURSOR_SIZE_ROI_W(roi_w));
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mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_BASE_ADDR(lm), cursor_addr);
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blendcfg = MDP5_LM_CURSOR_BLEND_CONFIG_BLEND_EN;
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blendcfg |= MDP5_LM_CURSOR_BLEND_CONFIG_BLEND_TRANSP_EN;
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blendcfg |= MDP5_LM_CURSOR_BLEND_CONFIG_BLEND_ALPHA_SEL(cur_alpha);
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mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_BLEND_CONFIG(lm), blendcfg);
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mdp5_crtc->cursor.scanout_bo = cursor_bo;
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mdp5_crtc->cursor.width = width;
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mdp5_crtc->cursor.height = height;
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spin_unlock_irqrestore(&mdp5_crtc->cursor.lock, flags);
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ret = mdp5_ctl_set_cursor(mdp5_crtc->ctl, true);
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@ -489,31 +525,18 @@ static int mdp5_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
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struct mdp5_kms *mdp5_kms = get_kms(crtc);
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struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
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uint32_t flush_mask = mdp_ctl_flush_mask_cursor(0);
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uint32_t xres = crtc->mode.hdisplay;
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uint32_t yres = crtc->mode.vdisplay;
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uint32_t roi_w;
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uint32_t roi_h;
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unsigned long flags;
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x = (x > 0) ? x : 0;
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y = (y > 0) ? y : 0;
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/* In case the CRTC is disabled, just drop the cursor update */
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if (unlikely(!crtc->state->enable))
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return 0;
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/*
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* Cursor Region Of Interest (ROI) is a plane read from cursor
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* buffer to render. The ROI region is determined by the visiblity of
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* the cursor point. In the default Cursor image the cursor point will
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* be at the top left of the cursor image, unless it is specified
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* otherwise using hotspot feature.
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*
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* If the cursor point reaches the right (xres - x < cursor.width) or
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* bottom (yres - y < cursor.height) boundary of the screen, then ROI
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* width and ROI height need to be evaluated to crop the cursor image
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* accordingly.
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* (xres-x) will be new cursor width when x > (xres - cursor.width)
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* (yres-y) will be new cursor height when y > (yres - cursor.height)
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*/
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roi_w = min(mdp5_crtc->cursor.width, xres - x);
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roi_h = min(mdp5_crtc->cursor.height, yres - y);
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mdp5_crtc->cursor.x = x = max(x, 0);
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mdp5_crtc->cursor.y = y = max(y, 0);
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get_roi(crtc, &roi_w, &roi_h);
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spin_lock_irqsave(&mdp5_crtc->cursor.lock, flags);
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mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_SIZE(mdp5_crtc->lm),
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@ -544,8 +567,8 @@ static const struct drm_crtc_funcs mdp5_crtc_funcs = {
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static const struct drm_crtc_helper_funcs mdp5_crtc_helper_funcs = {
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.mode_fixup = mdp5_crtc_mode_fixup,
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.mode_set_nofb = mdp5_crtc_mode_set_nofb,
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.prepare = mdp5_crtc_disable,
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.commit = mdp5_crtc_enable,
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.disable = mdp5_crtc_disable,
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.enable = mdp5_crtc_enable,
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.atomic_check = mdp5_crtc_atomic_check,
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.atomic_begin = mdp5_crtc_atomic_begin,
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.atomic_flush = mdp5_crtc_atomic_flush,
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@ -267,14 +267,14 @@ static void mdp5_encoder_enable(struct drm_encoder *encoder)
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mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(intf), 1);
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spin_unlock_irqrestore(&mdp5_encoder->intf_lock, flags);
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mdp5_encoder->enabled = false;
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mdp5_encoder->enabled = true;
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}
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static const struct drm_encoder_helper_funcs mdp5_encoder_helper_funcs = {
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.mode_fixup = mdp5_encoder_mode_fixup,
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.mode_set = mdp5_encoder_mode_set,
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.prepare = mdp5_encoder_disable,
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.commit = mdp5_encoder_enable,
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.disable = mdp5_encoder_disable,
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.enable = mdp5_encoder_enable,
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};
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/* initialize encoder */
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@ -34,7 +34,10 @@ static void mdp5_irq_error_handler(struct mdp_irq *irq, uint32_t irqstatus)
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void mdp5_irq_preinstall(struct msm_kms *kms)
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{
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struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
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mdp5_enable(mdp5_kms);
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mdp5_write(mdp5_kms, REG_MDP5_INTR_CLEAR, 0xffffffff);
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mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000);
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mdp5_disable(mdp5_kms);
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}
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int mdp5_irq_postinstall(struct msm_kms *kms)
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@ -57,7 +60,9 @@ int mdp5_irq_postinstall(struct msm_kms *kms)
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void mdp5_irq_uninstall(struct msm_kms *kms)
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{
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struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
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mdp5_enable(mdp5_kms);
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mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000);
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mdp5_disable(mdp5_kms);
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}
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static void mdp5_irq_mdp(struct mdp_kms *mdp_kms)
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@ -219,8 +219,10 @@ int msm_atomic_commit(struct drm_device *dev,
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* mark our set of crtc's as busy:
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*/
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ret = start_atomic(dev->dev_private, c->crtc_mask);
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if (ret)
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if (ret) {
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kfree(c);
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return ret;
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}
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/*
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* This is the point of no return - everything below never fails except
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Loading…
Reference in New Issue