drm/armada: convert overlay plane vbl worker to a armada plane worker
Convert the overlay plane to use the generic armada plane worker infrastructure which is shared with the primary plane. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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4b5dda82c2
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4a8506d2d6
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@ -226,44 +226,15 @@ int armada_drm_plane_work_wait(struct armada_plane *plane, long timeout)
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return wait_event_timeout(plane->frame_wait, !plane->work, timeout);
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return wait_event_timeout(plane->frame_wait, !plane->work, timeout);
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}
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}
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void armada_drm_vbl_event_add(struct armada_crtc *dcrtc,
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struct armada_plane_work *armada_drm_plane_work_cancel(
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struct armada_vbl_event *evt)
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struct armada_crtc *dcrtc, struct armada_plane *plane)
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{
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{
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unsigned long flags;
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struct armada_plane_work *work = xchg(&plane->work, NULL);
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bool not_on_list;
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WARN_ON(drm_vblank_get(dcrtc->crtc.dev, dcrtc->num));
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if (work)
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spin_lock_irqsave(&dcrtc->irq_lock, flags);
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not_on_list = list_empty(&evt->node);
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if (not_on_list)
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list_add_tail(&evt->node, &dcrtc->vbl_list);
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spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
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if (!not_on_list)
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drm_vblank_put(dcrtc->crtc.dev, dcrtc->num);
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drm_vblank_put(dcrtc->crtc.dev, dcrtc->num);
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}
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void armada_drm_vbl_event_remove(struct armada_crtc *dcrtc,
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return work;
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struct armada_vbl_event *evt)
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{
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spin_lock_irq(&dcrtc->irq_lock);
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if (!list_empty(&evt->node)) {
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list_del_init(&evt->node);
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drm_vblank_put(dcrtc->crtc.dev, dcrtc->num);
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}
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spin_unlock_irq(&dcrtc->irq_lock);
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}
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static void armada_drm_vbl_event_run(struct armada_crtc *dcrtc)
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{
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struct armada_vbl_event *e, *n;
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list_for_each_entry_safe(e, n, &dcrtc->vbl_list, node) {
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list_del_init(&e->node);
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drm_vblank_put(dcrtc->crtc.dev, dcrtc->num);
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e->fn(dcrtc, e->data);
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}
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}
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}
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static int armada_drm_crtc_queue_frame_work(struct armada_crtc *dcrtc,
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static int armada_drm_crtc_queue_frame_work(struct armada_crtc *dcrtc,
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@ -429,6 +400,7 @@ static bool armada_drm_crtc_mode_fixup(struct drm_crtc *crtc,
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static void armada_drm_crtc_irq(struct armada_crtc *dcrtc, u32 stat)
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static void armada_drm_crtc_irq(struct armada_crtc *dcrtc, u32 stat)
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{
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{
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void __iomem *base = dcrtc->base;
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void __iomem *base = dcrtc->base;
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struct drm_plane *ovl_plane;
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if (stat & DMA_FF_UNDERFLOW)
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if (stat & DMA_FF_UNDERFLOW)
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DRM_ERROR("video underflow on crtc %u\n", dcrtc->num);
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DRM_ERROR("video underflow on crtc %u\n", dcrtc->num);
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@ -439,7 +411,12 @@ static void armada_drm_crtc_irq(struct armada_crtc *dcrtc, u32 stat)
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drm_handle_vblank(dcrtc->crtc.dev, dcrtc->num);
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drm_handle_vblank(dcrtc->crtc.dev, dcrtc->num);
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spin_lock(&dcrtc->irq_lock);
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spin_lock(&dcrtc->irq_lock);
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armada_drm_vbl_event_run(dcrtc);
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ovl_plane = dcrtc->plane;
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if (ovl_plane) {
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struct armada_plane *plane = drm_to_armada_plane(ovl_plane);
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armada_drm_plane_work_run(dcrtc, plane);
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wake_up(&plane->frame_wait);
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}
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if (stat & GRA_FRAME_IRQ && dcrtc->interlaced) {
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if (stat & GRA_FRAME_IRQ && dcrtc->interlaced) {
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int i = stat & GRA_FRAME_IRQ0 ? 0 : 1;
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int i = stat & GRA_FRAME_IRQ0 ? 0 : 1;
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@ -1188,7 +1165,6 @@ static int armada_drm_crtc_create(struct drm_device *drm, struct device *dev,
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dcrtc->spu_iopad_ctrl = CFG_VSCALE_LN_EN | CFG_IOPAD_DUMB24;
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dcrtc->spu_iopad_ctrl = CFG_VSCALE_LN_EN | CFG_IOPAD_DUMB24;
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spin_lock_init(&dcrtc->irq_lock);
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spin_lock_init(&dcrtc->irq_lock);
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dcrtc->irq_ena = CLEAN_SPU_IRQ_ISR;
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dcrtc->irq_ena = CLEAN_SPU_IRQ_ISR;
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INIT_LIST_HEAD(&dcrtc->vbl_list);
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/* Initialize some registers which we don't otherwise set */
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/* Initialize some registers which we don't otherwise set */
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writel_relaxed(0x00000001, dcrtc->base + LCD_CFG_SCLK_DIV);
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writel_relaxed(0x00000001, dcrtc->base + LCD_CFG_SCLK_DIV);
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@ -52,6 +52,8 @@ int armada_drm_plane_init(struct armada_plane *plane);
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int armada_drm_plane_work_queue(struct armada_crtc *dcrtc,
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int armada_drm_plane_work_queue(struct armada_crtc *dcrtc,
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struct armada_plane *plane, struct armada_plane_work *work);
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struct armada_plane *plane, struct armada_plane_work *work);
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int armada_drm_plane_work_wait(struct armada_plane *plane, long timeout);
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int armada_drm_plane_work_wait(struct armada_plane *plane, long timeout);
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struct armada_plane_work *armada_drm_plane_work_cancel(
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struct armada_crtc *dcrtc, struct armada_plane *plane);
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struct armada_crtc {
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struct armada_crtc {
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struct drm_crtc crtc;
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struct drm_crtc crtc;
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@ -87,27 +89,9 @@ struct armada_crtc {
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spinlock_t irq_lock;
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spinlock_t irq_lock;
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uint32_t irq_ena;
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uint32_t irq_ena;
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struct list_head vbl_list;
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};
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};
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#define drm_to_armada_crtc(c) container_of(c, struct armada_crtc, crtc)
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#define drm_to_armada_crtc(c) container_of(c, struct armada_crtc, crtc)
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struct armada_vbl_event {
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struct list_head node;
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void *data;
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void (*fn)(struct armada_crtc *, void *);
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};
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void armada_drm_vbl_event_add(struct armada_crtc *,
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struct armada_vbl_event *);
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void armada_drm_vbl_event_remove(struct armada_crtc *,
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struct armada_vbl_event *);
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#define armada_drm_vbl_event_init(_e, _f, _d) do { \
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struct armada_vbl_event *__e = _e; \
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INIT_LIST_HEAD(&__e->node); \
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__e->data = _d; \
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__e->fn = _f; \
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} while (0)
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void armada_drm_crtc_gamma_set(struct drm_crtc *, u16, u16, u16, int);
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void armada_drm_crtc_gamma_set(struct drm_crtc *, u16, u16, u16, int);
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void armada_drm_crtc_gamma_get(struct drm_crtc *, u16 *, u16 *, u16 *, int);
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void armada_drm_crtc_gamma_get(struct drm_crtc *, u16 *, u16 *, u16 *, int);
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void armada_drm_crtc_disable_irq(struct armada_crtc *, u32);
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void armada_drm_crtc_disable_irq(struct armada_crtc *, u32);
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@ -37,7 +37,7 @@ struct armada_ovl_plane {
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uint32_t dst_yx;
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uint32_t dst_yx;
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uint32_t ctrl0;
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uint32_t ctrl0;
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struct {
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struct {
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struct armada_vbl_event update;
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struct armada_plane_work work;
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struct armada_regs regs[13];
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struct armada_regs regs[13];
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} vbl;
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} vbl;
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struct armada_ovl_plane_properties prop;
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struct armada_ovl_plane_properties prop;
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@ -82,14 +82,13 @@ static void armada_ovl_retire_fb(struct armada_ovl_plane *dplane,
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}
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}
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/* === Plane support === */
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/* === Plane support === */
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static void armada_ovl_plane_vbl(struct armada_crtc *dcrtc, void *data)
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static void armada_ovl_plane_work(struct armada_crtc *dcrtc,
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struct armada_plane *plane, struct armada_plane_work *work)
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{
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{
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struct armada_ovl_plane *dplane = data;
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struct armada_ovl_plane *dplane = container_of(plane, struct armada_ovl_plane, base);
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armada_drm_crtc_update_regs(dcrtc, dplane->vbl.regs);
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armada_drm_crtc_update_regs(dcrtc, dplane->vbl.regs);
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armada_ovl_retire_fb(dplane, NULL);
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armada_ovl_retire_fb(dplane, NULL);
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wake_up(&dplane->base.frame_wait);
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}
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}
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static int
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static int
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@ -162,9 +161,8 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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dcrtc->base + LCD_SPU_SRAM_PARA1);
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dcrtc->base + LCD_SPU_SRAM_PARA1);
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}
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}
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wait_event_timeout(dplane->base.frame_wait,
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if (armada_drm_plane_work_wait(&dplane->base, HZ / 25) == 0)
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list_empty(&dplane->vbl.update.node),
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armada_drm_plane_work_cancel(dcrtc, &dplane->base);
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HZ/25);
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if (plane->fb != fb) {
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if (plane->fb != fb) {
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struct armada_gem_object *obj = drm_fb_obj(fb);
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struct armada_gem_object *obj = drm_fb_obj(fb);
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@ -255,7 +253,8 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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}
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}
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if (idx) {
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if (idx) {
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armada_reg_queue_end(dplane->vbl.regs, idx);
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armada_reg_queue_end(dplane->vbl.regs, idx);
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armada_drm_vbl_event_add(dcrtc, &dplane->vbl.update);
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armada_drm_plane_work_queue(dcrtc, &dplane->base,
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&dplane->vbl.work);
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}
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}
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return 0;
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return 0;
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}
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}
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@ -270,14 +269,13 @@ static int armada_ovl_plane_disable(struct drm_plane *plane)
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return 0;
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return 0;
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dcrtc = drm_to_armada_crtc(dplane->base.base.crtc);
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dcrtc = drm_to_armada_crtc(dplane->base.base.crtc);
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dcrtc->plane = NULL;
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armada_drm_vbl_event_remove(dcrtc, &dplane->vbl.update);
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dplane->ctrl0 = 0;
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armada_drm_plane_work_cancel(dcrtc, &dplane->base);
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armada_drm_crtc_plane_disable(dcrtc, plane);
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armada_drm_crtc_plane_disable(dcrtc, plane);
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dcrtc->plane = NULL;
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dplane->ctrl0 = 0;
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fb = xchg(&dplane->old_fb, NULL);
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fb = xchg(&dplane->old_fb, NULL);
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if (fb)
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if (fb)
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drm_framebuffer_unreference(fb);
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drm_framebuffer_unreference(fb);
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@ -456,8 +454,7 @@ int armada_overlay_plane_create(struct drm_device *dev, unsigned long crtcs)
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return ret;
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return ret;
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}
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}
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armada_drm_vbl_event_init(&dplane->vbl.update, armada_ovl_plane_vbl,
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dplane->vbl.work.fn = armada_ovl_plane_work;
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dplane);
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ret = drm_universal_plane_init(dev, &dplane->base.base, crtcs,
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ret = drm_universal_plane_init(dev, &dplane->base.base, crtcs,
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&armada_ovl_plane_funcs,
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&armada_ovl_plane_funcs,
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