rtl8180: add rtl8187se HW initialization
This patch adds few functions that initializes extra stuff that is present only in rtl8187se HW, and it modify the existing HW initialization function where necessary Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Andrea Merello
John W. Linville
parent
711d4ed381
commit
4a67aa5d64
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@ -578,6 +578,75 @@ void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
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rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
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}
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static void rtl8187se_mac_config(struct ieee80211_hw *dev)
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{
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struct rtl8180_priv *priv = dev->priv;
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u8 reg;
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rtl818x_iowrite32(priv, REG_ADDR4(0x1F0), 0);
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rtl818x_ioread32(priv, REG_ADDR4(0x1F0));
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rtl818x_iowrite32(priv, REG_ADDR4(0x1F4), 0);
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rtl818x_ioread32(priv, REG_ADDR4(0x1F4));
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rtl818x_iowrite8(priv, REG_ADDR1(0x1F8), 0);
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rtl818x_ioread8(priv, REG_ADDR1(0x1F8));
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/* Enable DA10 TX power saving */
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reg = rtl818x_ioread8(priv, &priv->map->PHY_PR);
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rtl818x_iowrite8(priv, &priv->map->PHY_PR, reg | 0x04);
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/* Power */
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rtl818x_iowrite16(priv, PI_DATA_REG, 0x1000);
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rtl818x_iowrite16(priv, SI_DATA_REG, 0x1000);
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/* AFE - default to power ON */
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rtl818x_iowrite16(priv, REG_ADDR2(0x370), 0x0560);
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rtl818x_iowrite16(priv, REG_ADDR2(0x372), 0x0560);
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rtl818x_iowrite16(priv, REG_ADDR2(0x374), 0x0DA4);
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rtl818x_iowrite16(priv, REG_ADDR2(0x376), 0x0DA4);
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rtl818x_iowrite16(priv, REG_ADDR2(0x378), 0x0560);
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rtl818x_iowrite16(priv, REG_ADDR2(0x37A), 0x0560);
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rtl818x_iowrite16(priv, REG_ADDR2(0x37C), 0x00EC);
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rtl818x_iowrite16(priv, REG_ADDR2(0x37E), 0x00EC);
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rtl818x_iowrite8(priv, REG_ADDR1(0x24E), 0x01);
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/* unknown, needed for suspend to RAM resume */
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rtl818x_iowrite8(priv, REG_ADDR1(0x0A), 0x72);
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}
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static void rtl8187se_set_antenna_config(struct ieee80211_hw *dev, u8 def_ant,
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bool diversity)
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{
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struct rtl8180_priv *priv = dev->priv;
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rtl8225_write_phy_cck(dev, 0x0C, 0x09);
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if (diversity) {
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if (def_ant == 1) {
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rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x00);
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rtl8225_write_phy_cck(dev, 0x11, 0xBB);
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rtl8225_write_phy_cck(dev, 0x01, 0xC7);
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rtl8225_write_phy_ofdm(dev, 0x0D, 0x54);
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rtl8225_write_phy_ofdm(dev, 0x18, 0xB2);
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} else { /* main antenna */
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rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x03);
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rtl8225_write_phy_cck(dev, 0x11, 0x9B);
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rtl8225_write_phy_cck(dev, 0x01, 0xC7);
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rtl8225_write_phy_ofdm(dev, 0x0D, 0x5C);
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rtl8225_write_phy_ofdm(dev, 0x18, 0xB2);
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}
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} else { /* disable antenna diversity */
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if (def_ant == 1) {
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rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x00);
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rtl8225_write_phy_cck(dev, 0x11, 0xBB);
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rtl8225_write_phy_cck(dev, 0x01, 0x47);
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rtl8225_write_phy_ofdm(dev, 0x0D, 0x54);
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rtl8225_write_phy_ofdm(dev, 0x18, 0x32);
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} else { /* main antenna */
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rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x03);
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rtl8225_write_phy_cck(dev, 0x11, 0x9B);
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rtl8225_write_phy_cck(dev, 0x01, 0x47);
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rtl8225_write_phy_ofdm(dev, 0x0D, 0x5C);
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rtl8225_write_phy_ofdm(dev, 0x18, 0x32);
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}
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}
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/* priv->curr_ant = def_ant; */
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}
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static void rtl8180_int_enable(struct ieee80211_hw *dev)
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{
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struct rtl8180_priv *priv = dev->priv;
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@ -666,6 +735,7 @@ static int rtl8180_init_hw(struct ieee80211_hw *dev)
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{
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struct rtl8180_priv *priv = dev->priv;
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u16 reg;
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u32 reg32;
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rtl818x_iowrite8(priv, &priv->map->CMD, 0);
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rtl818x_ioread8(priv, &priv->map->CMD);
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@ -696,14 +766,36 @@ static int rtl8180_init_hw(struct ieee80211_hw *dev)
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rtl8180_config_cardbus(dev);
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}
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rtl818x_iowrite8(priv, &priv->map->MSR, 0);
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if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
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rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
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else
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rtl818x_iowrite8(priv, &priv->map->MSR, 0);
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if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180)
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rtl8180_set_anaparam(priv, priv->anaparam);
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rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
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rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[1].dma);
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rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
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/* mac80211 queue have higher prio for lower index. The last queue
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* (that mac80211 is not aware of) is reserved for beacons (and have
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* the highest priority on the NIC)
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*/
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if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8187SE) {
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rtl818x_iowrite32(priv, &priv->map->TBDA,
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priv->tx_ring[1].dma);
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rtl818x_iowrite32(priv, &priv->map->TLPDA,
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priv->tx_ring[0].dma);
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} else {
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rtl818x_iowrite32(priv, &priv->map->TBDA,
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priv->tx_ring[4].dma);
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rtl818x_iowrite32(priv, &priv->map->TVODA,
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priv->tx_ring[0].dma);
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rtl818x_iowrite32(priv, &priv->map->TVIDA,
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priv->tx_ring[1].dma);
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rtl818x_iowrite32(priv, &priv->map->TBEDA,
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priv->tx_ring[2].dma);
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rtl818x_iowrite32(priv, &priv->map->TBKDA,
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priv->tx_ring[3].dma);
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}
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/* TODO: necessary? specs indicate not */
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rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
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@ -724,7 +816,14 @@ static int rtl8180_init_hw(struct ieee80211_hw *dev)
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if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180) {
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rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
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rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
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} else {
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rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
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rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
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rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
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}
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if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8185) {
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/* TODO: set ClkRun enable? necessary? */
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reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
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rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
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@ -732,11 +831,55 @@ static int rtl8180_init_hw(struct ieee80211_hw *dev)
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reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
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rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
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rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
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} else {
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rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
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}
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rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
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rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
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if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
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/* the set auto rate fallback bitmask from 1M to 54 Mb/s */
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rtl818x_iowrite16(priv, ARFR, 0xFFF);
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rtl818x_ioread16(priv, ARFR);
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/* stop unused queus (no dma alloc) */
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rtl818x_iowrite8(priv, &priv->map->TPPOLL_STOP,
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RTL818x_TPPOLL_STOP_MG | RTL818x_TPPOLL_STOP_HI);
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rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0x00);
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rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
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rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
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/* some black magic here.. */
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rtl8187se_mac_config(dev);
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rtl818x_iowrite16(priv, RFSW_CTRL, 0x569A);
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rtl818x_ioread16(priv, RFSW_CTRL);
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rtl8180_set_anaparam(priv, RTL8225SE_ANAPARAM_ON);
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rtl8180_set_anaparam2(priv, RTL8225SE_ANAPARAM2_ON);
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rtl8180_set_anaparam3(priv, RTL8225SE_ANAPARAM3);
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rtl818x_iowrite8(priv, &priv->map->CONFIG5,
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rtl818x_ioread8(priv, &priv->map->CONFIG5) & 0x7F);
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/*probably this switch led on */
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rtl818x_iowrite8(priv, &priv->map->PGSELECT,
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rtl818x_ioread8(priv, &priv->map->PGSELECT) | 0x08);
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rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
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rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1BFF);
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rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
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rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x4003);
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/* the reference code mac hardcode table write
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* this reg by doing byte-wide accesses.
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* It does it just for lowest and highest byte..
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*/
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reg32 = rtl818x_ioread32(priv, &priv->map->RF_PARA);
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reg32 &= 0x00ffff00;
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reg32 |= 0xb8000054;
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rtl818x_iowrite32(priv, &priv->map->RF_PARA, reg32);
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}
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priv->rf->init(dev);
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@ -752,6 +895,10 @@ static int rtl8180_init_hw(struct ieee80211_hw *dev)
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else
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rtl8180_conf_basic_rates(dev, 0x1f3);
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if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
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rtl8187se_set_antenna_config(dev,
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priv->antenna_diversity_default,
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priv->antenna_diversity_en);
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return 0;
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}
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@ -926,11 +1073,13 @@ static int rtl8180_start(struct ieee80211_hw *dev)
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if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8185)
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reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
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else {
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else if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180) {
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reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
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? RTL818X_RX_CONF_CSDM1 : 0;
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reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
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? RTL818X_RX_CONF_CSDM2 : 0;
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} else {
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reg &= ~(RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2);
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}
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priv->rx_conf = reg;
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@ -968,7 +1117,8 @@ static int rtl8180_start(struct ieee80211_hw *dev)
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reg |= (6 << 21 /* MAX TX DMA */) |
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RTL818X_TX_CONF_NO_ICV;
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if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
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reg |= 1<<30; /* "duration procedure mode" */
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if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180)
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reg &= ~RTL818X_TX_CONF_PROBE_DTS;
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