KVM: arm64: Fix AArch32 handling of DBGD{CCINT,SCRext} and DBGVCR
The DBGD{CCINT,SCRext} and DBGVCR register entries in the cp14 array
are missing their target register, resulting in all accesses being
targetted at the guard sysreg (indexed by __INVALID_SYSREG__).
Point the emulation code at the actual register entries.
Fixes: bdfb4b389c
("arm64: KVM: add trap handlers for AArch32 debug registers")
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20201029172409.2768336-1-maz@kernel.org
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@ -239,6 +239,7 @@ enum vcpu_sysreg {
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#define cp14_DBGWCR0 (DBGWCR0_EL1 * 2)
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#define cp14_DBGWVR0 (DBGWVR0_EL1 * 2)
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#define cp14_DBGDCCINT (MDCCINT_EL1 * 2)
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#define cp14_DBGVCR (DBGVCR32_EL2 * 2)
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#define NR_COPRO_REGS (NR_SYS_REGS * 2)
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@ -1881,9 +1881,9 @@ static const struct sys_reg_desc cp14_regs[] = {
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{ Op1( 0), CRn( 0), CRm( 1), Op2( 0), trap_raz_wi },
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DBG_BCR_BVR_WCR_WVR(1),
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/* DBGDCCINT */
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{ Op1( 0), CRn( 0), CRm( 2), Op2( 0), trap_debug32 },
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{ Op1( 0), CRn( 0), CRm( 2), Op2( 0), trap_debug32, NULL, cp14_DBGDCCINT },
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/* DBGDSCRext */
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{ Op1( 0), CRn( 0), CRm( 2), Op2( 2), trap_debug32 },
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{ Op1( 0), CRn( 0), CRm( 2), Op2( 2), trap_debug32, NULL, cp14_DBGDSCRext },
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DBG_BCR_BVR_WCR_WVR(2),
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/* DBGDTR[RT]Xint */
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{ Op1( 0), CRn( 0), CRm( 3), Op2( 0), trap_raz_wi },
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@ -1898,7 +1898,7 @@ static const struct sys_reg_desc cp14_regs[] = {
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{ Op1( 0), CRn( 0), CRm( 6), Op2( 2), trap_raz_wi },
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DBG_BCR_BVR_WCR_WVR(6),
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/* DBGVCR */
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{ Op1( 0), CRn( 0), CRm( 7), Op2( 0), trap_debug32 },
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{ Op1( 0), CRn( 0), CRm( 7), Op2( 0), trap_debug32, NULL, cp14_DBGVCR },
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DBG_BCR_BVR_WCR_WVR(7),
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DBG_BCR_BVR_WCR_WVR(8),
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DBG_BCR_BVR_WCR_WVR(9),
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