drm/amd/display: fix dcn315 single stream crb allocation
Change to improve avoiding asymetric crb calculations for single stream scenarios. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1628,6 +1628,10 @@ static bool allow_pixel_rate_crb(struct dc *dc, struct dc_state *context)
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int i;
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struct resource_context *res_ctx = &context->res_ctx;
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/*Don't apply for single stream*/
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if (context->stream_count < 2)
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return false;
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for (i = 0; i < dc->res_pool->pipe_count; i++) {
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if (!res_ctx->pipe_ctx[i].stream)
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continue;
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@ -1727,19 +1731,23 @@ static int dcn315_populate_dml_pipes_from_context(
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pipe_cnt++;
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}
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/* Spread remaining unreserved crb evenly among all pipes, use default policy if not enough det or single pipe */
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/* Spread remaining unreserved crb evenly among all pipes*/
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if (pixel_rate_crb) {
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for (i = 0, pipe_cnt = 0, crb_idx = 0; i < dc->res_pool->pipe_count; i++) {
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pipe = &res_ctx->pipe_ctx[i];
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if (!pipe->stream)
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continue;
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/* Do not use asymetric crb if not enough for pstate support */
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if (remaining_det_segs < 0) {
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pipes[pipe_cnt].pipe.src.det_size_override = 0;
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continue;
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}
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if (!pipe->top_pipe && !pipe->prev_odm_pipe) {
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bool split_required = pipe->stream->timing.pix_clk_100hz >= dcn_get_max_non_odm_pix_rate_100hz(&dc->dml.soc)
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|| (pipe->plane_state && pipe->plane_state->src_rect.width > 5120);
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if (remaining_det_segs < 0 || crb_pipes == 1)
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pipes[pipe_cnt].pipe.src.det_size_override = 0;
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if (remaining_det_segs > MIN_RESERVED_DET_SEGS)
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pipes[pipe_cnt].pipe.src.det_size_override += (remaining_det_segs - MIN_RESERVED_DET_SEGS) / crb_pipes +
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(crb_idx < (remaining_det_segs - MIN_RESERVED_DET_SEGS) % crb_pipes ? 1 : 0);
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@ -1755,6 +1763,7 @@ static int dcn315_populate_dml_pipes_from_context(
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}
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/* Convert segments into size for DML use */
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pipes[pipe_cnt].pipe.src.det_size_override *= DCN3_15_CRB_SEGMENT_SIZE_KB;
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crb_idx++;
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}
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pipe_cnt++;
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