ARM: imx6q: let users input debug uart port number
imx6q gets 5 uart ports in total. Different board design may choose different port as debug uart. For example, imx6q-sabresd uses UART1, imx6q-sabrelite uses UART2 and imx6q-arm2 uses UART4. Rather than bloating DEBUG_LL choice list with all these uart ports, the patch introduces DEBUG_IMX6Q_UART_PORT for users to input uart port number when DEBUG_IMX6Q_UART is selected inside DEBUG_LL choice. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -209,20 +209,12 @@ choice
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Say Y here if you want kernel low-level debugging support
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on i.MX50 or i.MX53.
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config DEBUG_IMX6Q_UART2
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bool "i.MX6Q Debug UART2"
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config DEBUG_IMX6Q_UART
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bool "i.MX6Q Debug UART"
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depends on SOC_IMX6Q
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help
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Say Y here if you want kernel low-level debugging support
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on i.MX6Q UART2. This is correct for e.g. the SabreLite
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board.
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config DEBUG_IMX6Q_UART4
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bool "i.MX6Q Debug UART4"
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depends on SOC_IMX6Q
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help
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Say Y here if you want kernel low-level debugging support
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on i.MX6Q UART4.
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on i.MX6Q.
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config DEBUG_MMP_UART2
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bool "Kernel low-level debugging message via MMP UART2"
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@ -409,6 +401,15 @@ choice
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endchoice
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config DEBUG_IMX6Q_UART_PORT
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int "i.MX6Q Debug UART Port (1-5)" if DEBUG_IMX6Q_UART
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range 1 5
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default 1
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depends on SOC_IMX6Q
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help
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Choose UART port on which kernel low-level debug messages
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should be output.
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config DEBUG_LL_INCLUDE
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string
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default "debug/icedcc.S" if DEBUG_ICEDCC
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@ -418,8 +419,7 @@ config DEBUG_LL_INCLUDE
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DEBUG_IMX31_IMX35_UART || \
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DEBUG_IMX51_UART || \
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DEBUG_IMX50_IMX53_UART ||\
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DEBUG_IMX6Q_UART2 || \
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DEBUG_IMX6Q_UART4
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DEBUG_IMX6Q_UART
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default "debug/highbank.S" if DEBUG_HIGHBANK_UART
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default "debug/mvebu.S" if DEBUG_MVEBU_UART
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default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
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@ -10,6 +10,20 @@
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* published by the Free Software Foundation.
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*
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*/
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#define IMX6Q_UART1_BASE_ADDR 0x02020000
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#define IMX6Q_UART2_BASE_ADDR 0x021e8000
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#define IMX6Q_UART3_BASE_ADDR 0x021ec000
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#define IMX6Q_UART4_BASE_ADDR 0x021f0000
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#define IMX6Q_UART5_BASE_ADDR 0x021f4000
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/*
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* IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion
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* of IMX6Q_UART##n##_BASE_ADDR.
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*/
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#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR
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#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n)
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#define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT)
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#ifdef CONFIG_DEBUG_IMX1_UART
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#define UART_PADDR 0x00206000
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#elif defined (CONFIG_DEBUG_IMX25_UART)
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@ -22,10 +36,8 @@
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#define UART_PADDR 0x73fbc000
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#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
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#define UART_PADDR 0x53fbc000
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#elif defined (CONFIG_DEBUG_IMX6Q_UART2)
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#define UART_PADDR 0x021e8000
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#elif defined (CONFIG_DEBUG_IMX6Q_UART4)
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#define UART_PADDR 0x021f0000
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#elif defined (CONFIG_DEBUG_IMX6Q_UART)
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#define UART_PADDR IMX6Q_DEBUG_UART_BASE
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#endif
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/*
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@ -17,17 +17,25 @@
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#include "hardware.h"
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#define IMX6Q_UART1_BASE_ADDR 0x02020000
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#define IMX6Q_UART2_BASE_ADDR 0x021e8000
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#define IMX6Q_UART3_BASE_ADDR 0x021ec000
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#define IMX6Q_UART4_BASE_ADDR 0x021f0000
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#define IMX6Q_UART5_BASE_ADDR 0x021f4000
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/*
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* IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion
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* of IMX6Q_UART##n##_BASE_ADDR.
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*/
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#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR
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#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n)
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#define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT)
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static struct map_desc imx_lluart_desc = {
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#ifdef CONFIG_DEBUG_IMX6Q_UART2
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.virtual = MX6Q_IO_P2V(MX6Q_UART2_BASE_ADDR),
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.pfn = __phys_to_pfn(MX6Q_UART2_BASE_ADDR),
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.length = MX6Q_UART2_SIZE,
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.type = MT_DEVICE,
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#endif
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#ifdef CONFIG_DEBUG_IMX6Q_UART4
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.virtual = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR),
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.pfn = __phys_to_pfn(MX6Q_UART4_BASE_ADDR),
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.length = MX6Q_UART4_SIZE,
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#ifdef CONFIG_DEBUG_IMX6Q_UART
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.virtual = IMX_IO_P2V(IMX6Q_DEBUG_UART_BASE),
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.pfn = __phys_to_pfn(IMX6Q_DEBUG_UART_BASE),
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.length = 0x4000,
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.type = MT_DEVICE,
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#endif
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};
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@ -27,9 +27,5 @@
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#define MX6Q_CCM_SIZE 0x4000
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#define MX6Q_ANATOP_BASE_ADDR 0x020c8000
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#define MX6Q_ANATOP_SIZE 0x1000
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#define MX6Q_UART2_BASE_ADDR 0x021e8000
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#define MX6Q_UART2_SIZE 0x4000
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#define MX6Q_UART4_BASE_ADDR 0x021f0000
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#define MX6Q_UART4_SIZE 0x4000
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#endif /* __MACH_MX6Q_H__ */
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