NVMe: Unify SQ entry writing and doorbell ringing
This patch changes sq_cmd writers to instead create their command on the stack. __nvme_submit_cmd copies the sq entry to the queue and writes the doorbell. Signed-off-by: Jon Derrick <jonathan.derrick@intel.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jens Axboe <axboe@fb.com>
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@ -730,18 +730,16 @@ static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
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static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
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static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
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struct nvme_iod *iod)
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struct nvme_iod *iod)
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{
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{
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struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
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struct nvme_command cmnd;
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memcpy(cmnd, req->cmd, sizeof(struct nvme_command));
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memcpy(&cmnd, req->cmd, sizeof(cmnd));
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cmnd->rw.command_id = req->tag;
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cmnd.rw.command_id = req->tag;
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if (req->nr_phys_segments) {
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if (req->nr_phys_segments) {
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cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
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cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
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cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
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cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
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}
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}
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if (++nvmeq->sq_tail == nvmeq->q_depth)
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__nvme_submit_cmd(nvmeq, &cmnd);
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nvmeq->sq_tail = 0;
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writel(nvmeq->sq_tail, nvmeq->q_db);
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}
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}
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/*
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/*
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@ -754,45 +752,41 @@ static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
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{
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{
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struct nvme_dsm_range *range =
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struct nvme_dsm_range *range =
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(struct nvme_dsm_range *)iod_list(iod)[0];
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(struct nvme_dsm_range *)iod_list(iod)[0];
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struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
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struct nvme_command cmnd;
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range->cattr = cpu_to_le32(0);
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range->cattr = cpu_to_le32(0);
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range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
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range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
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range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
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range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
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memset(cmnd, 0, sizeof(*cmnd));
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memset(&cmnd, 0, sizeof(cmnd));
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cmnd->dsm.opcode = nvme_cmd_dsm;
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cmnd.dsm.opcode = nvme_cmd_dsm;
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cmnd->dsm.command_id = req->tag;
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cmnd.dsm.command_id = req->tag;
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cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
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cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
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cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
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cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
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cmnd->dsm.nr = 0;
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cmnd.dsm.nr = 0;
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cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
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cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
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if (++nvmeq->sq_tail == nvmeq->q_depth)
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__nvme_submit_cmd(nvmeq, &cmnd);
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nvmeq->sq_tail = 0;
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writel(nvmeq->sq_tail, nvmeq->q_db);
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}
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}
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static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
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static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
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int cmdid)
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int cmdid)
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{
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{
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struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
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struct nvme_command cmnd;
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memset(cmnd, 0, sizeof(*cmnd));
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memset(&cmnd, 0, sizeof(cmnd));
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cmnd->common.opcode = nvme_cmd_flush;
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cmnd.common.opcode = nvme_cmd_flush;
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cmnd->common.command_id = cmdid;
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cmnd.common.command_id = cmdid;
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cmnd->common.nsid = cpu_to_le32(ns->ns_id);
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cmnd.common.nsid = cpu_to_le32(ns->ns_id);
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if (++nvmeq->sq_tail == nvmeq->q_depth)
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__nvme_submit_cmd(nvmeq, &cmnd);
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nvmeq->sq_tail = 0;
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writel(nvmeq->sq_tail, nvmeq->q_db);
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}
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}
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static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
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static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
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struct nvme_ns *ns)
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struct nvme_ns *ns)
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{
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{
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struct request *req = iod_get_private(iod);
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struct request *req = iod_get_private(iod);
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struct nvme_command *cmnd;
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struct nvme_command cmnd;
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u16 control = 0;
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u16 control = 0;
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u32 dsmgmt = 0;
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u32 dsmgmt = 0;
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@ -804,19 +798,17 @@ static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
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if (req->cmd_flags & REQ_RAHEAD)
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if (req->cmd_flags & REQ_RAHEAD)
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dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
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dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
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cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
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memset(&cmnd, 0, sizeof(cmnd));
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memset(cmnd, 0, sizeof(*cmnd));
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cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
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cmnd.rw.command_id = req->tag;
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cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
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cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
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cmnd->rw.command_id = req->tag;
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cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
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cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
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cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
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cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
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cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
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cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
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cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
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cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
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cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
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if (blk_integrity_rq(req)) {
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if (blk_integrity_rq(req)) {
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cmnd->rw.metadata = cpu_to_le64(sg_dma_address(iod->meta_sg));
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cmnd.rw.metadata = cpu_to_le64(sg_dma_address(iod->meta_sg));
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switch (ns->pi_type) {
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switch (ns->pi_type) {
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case NVME_NS_DPS_PI_TYPE3:
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case NVME_NS_DPS_PI_TYPE3:
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control |= NVME_RW_PRINFO_PRCHK_GUARD;
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control |= NVME_RW_PRINFO_PRCHK_GUARD;
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@ -825,19 +817,17 @@ static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
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case NVME_NS_DPS_PI_TYPE2:
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case NVME_NS_DPS_PI_TYPE2:
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control |= NVME_RW_PRINFO_PRCHK_GUARD |
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control |= NVME_RW_PRINFO_PRCHK_GUARD |
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NVME_RW_PRINFO_PRCHK_REF;
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NVME_RW_PRINFO_PRCHK_REF;
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cmnd->rw.reftag = cpu_to_le32(
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cmnd.rw.reftag = cpu_to_le32(
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nvme_block_nr(ns, blk_rq_pos(req)));
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nvme_block_nr(ns, blk_rq_pos(req)));
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break;
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break;
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}
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}
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} else if (ns->ms)
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} else if (ns->ms)
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control |= NVME_RW_PRINFO_PRACT;
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control |= NVME_RW_PRINFO_PRACT;
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cmnd->rw.control = cpu_to_le16(control);
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cmnd.rw.control = cpu_to_le16(control);
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cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
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cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
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if (++nvmeq->sq_tail == nvmeq->q_depth)
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__nvme_submit_cmd(nvmeq, &cmnd);
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nvmeq->sq_tail = 0;
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writel(nvmeq->sq_tail, nvmeq->q_db);
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return 0;
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return 0;
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}
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}
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